Item 1. Business

Incorporated in 1980, Lam Research Corporation (“Lam Research,” “Lam,” “we,” “our,” “us,” or “the Company”) is a Delaware corporation, headquartered in Fremont, California. We maintain a network of facilities throughout Asia, Europe, and the United States in order to meet the needs of our dynamic customer base.

Additional information about Lam Research is available on our website at www.lamresearch.com. The content on any website referred to in this Form 10-K is not a part of or incorporated by reference in this Form 10-K unless expressly noted.

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Our Annual Report on Form 10-K, Quarterly Reports on Forms 10-Q, Current Reports on Forms 8-K, Proxy Statements and all other filings we make with the SEC are available on our website as soon as reasonably practical after we file them with or furnish them to the SEC and are also available online at the SEC’s website at www.sec.gov.

The Lam Research logo, Lam Research, and all product and service names used in this report are either registered trademarks or trademarks of Lam Research Corporation or its subsidiaries in the United States and/or other countries. All other marks mentioned herein are the property of their respective holders.

We are a global supplier of innovative wafer fabrication equipment and services to the semiconductor industry. We have built a strong global presence with core competencies in areas like nanoscale applications enablement, chemistry, plasma and fluidics, advanced systems engineering and a broad range of operational disciplines. Our products and services are designed to help our customers build smaller, faster, and better performing devices that are used in a variety of electronic products, including mobile phones, personal computers, servers, wearables, automotive devices, storage devices, and networking equipment. Our vision is to realize full value from natural technology extensions of our company.

Our customer base includes leading semiconductor memory, foundry, and integrated device manufacturers (“IDMs”) that make products such as non-volatile memory (“NVM”), DRAM memory, and logic devices. We aim to increase our strategic relevance with our customers by contributing more to their continued success. Our core technical competency is integrating hardware, process, materials, software, and process control enabling results on the wafer.

Semiconductor manufacturing, our customers’ business, involves the complete fabrication of multiple dies or integrated circuits (“ICs”) on a wafer. This involves the repetition of a set of core processes and can require hundreds of individual steps. Fabricating these devices requires highly sophisticated process technologies to integrate an increasing array of new materials with precise control at the atomic scale. Along with meeting technical requirements, wafer processing equipment must deliver high productivity and be cost-effective.

Demand from cloud computing (the “Cloud”), the Internet of Things (“IoT”), and other markets is driving the need for increasingly powerful and cost-efficient semiconductors. At the same time, there are growing technical challenges with traditional two-dimensional scaling. These trends are driving significant inflections in semiconductor manufacturing, such as the increasing importance of vertical scaling strategies like three-dimensional (“3D”) architectures as well as multiple patterning to enable shrinks.

These demand and technology inflections have significantly expanded our addressable markets from about 26% of wafer fabrication equipment (“WFE”) spending in calendar year 2013 to about 34% in calendar year 2016. We believe we are in a strong position with our leadership and competency in deposition, etch, and single wafer clean to facilitate some of the most significant innovations in semiconductor device manufacturing. Several factors create opportunity for sustainable differentiation for us: (i) our focus on research and development, with several on-going programs relating to sustaining engineering, product and process development, and concept and feasibility; (ii) our ability to effectively leverage cycles of learning from our broad installed base; and (iii) our collaborative focus with semi-ecosystem partners.

We also address processes for back-end wafer-level packaging (“WLP”), which is an alternative to traditional wire bonding and can offer a smaller form factor, increased interconnect speed and bandwidth, and lower power consumption, among other benefits. In addition, our products are well-suited for related markets that rely on semiconductor processes and require production-proven manufacturing capability, such as complementary metal-oxide-semiconductor (“CMOS”) image sensors (“CIS”) and micro-electromechanical systems (“MEMS”).

Our Customer Support Business Group (“CSBG”) provides products and services to maximize installed equipment performance, predictability, and operational efficiency. We offer a broad range of services to deliver value throughout the lifecycle of our equipment, including customer service, spares, upgrades, and refurbishment of our deposition, etch, and clean products. Many of the technical advances that we introduce in our newest products are also available as upgrades, which provide customers with a cost-effective strategy for extending the performance and capabilities of their existing wafer fabrication lines. Additionally, CSBG provides new and refurbished previous-generation (legacy) equipment for those applications that do not require the most advanced wafer processing capability.

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Products

Thin Film Deposition

In leading-edge semiconductor designs, metal deposition processes face significant scaling and integration challenges. For advanced copper interconnect structures, challenges for electrochemical deposition (“ECD”) include providing complete, void-free fill of high aspect ratio (“HAR”) structures with low defectivity and high productivity. Electroplating of copper and other metals is also used for through-silicon via (“TSV”) and WLP applications, such as forming conductive bumps and redistribution layers (“RDLs”). These applications require excellent within-wafer uniformity with high plating rates, minimal defects, and cost competitiveness. For tungsten chemical vapor deposition (“CVD”)/atomic layer deposition (“ALD”) processes, key requirements are minimizing contact resistance to meet lower power consumption requirements and achieving void-free fill for narrow nanoscale structures. In addition, good barrier step coverage at reduced thicknesses relative to physical vapor deposition (“PVD”)/CVD barrier films is also needed to improve contact fill and reduce resistivity.

In dielectric deposition, high-productivity, high-quality films are needed for a number of critical patterning and gapfill applications. For example, atomic layer deposition is required for front-end-of-line (“FEOL”) transistor structures and back-end-of-line (“BEOL”) self-aligned multiple patterning schemes to deposit highly conformal and uniform films. For NVM applications, high-quality conformal films are needed to form device isolation and ensure structural integrity. Plasma-enhanced CVD (“PECVD”) is used to deposit multiple dielectric films, including the alternating mold stack layers used in NVM memory and critical patterning layers for logic/foundry. These applications require excellent thickness uniformity, low defectivity, and stress control. For gapfill deposition, achieving defect-free fills while maintaining high throughput is essential. Preferred approaches are to use high-density plasma CVD (“HDP-CVD”) either as a complete gapfill solution or as a cap over other gapfill technologies to enhance process control and mitigate integration risks. Lastly, innovative post-deposition film treatments such as ultraviolet thermal processing (“UVTP”) are being used to improve low-k film integrity and increase strain in nitride layers for improved device performance.

Copper Metal Films — SABRE® Product Family

The SABRE ECD product family is the industry’s leading system for copper damascene manufacturing. Electrofill® technology is designed to provide high-throughput, void-free fill with superior defect density performance for advanced technology nodes. SABRE chemistry packages provide leading-edge fill performance for low defectivity, a wide process window, and high rates of bottom-up growth to fill the most challenging HAR features. System capabilities include deposition of copper directly on various liner materials, important for next-generation metallization schemes. The number of yielding ICs per wafer is optimized by increasing the usable die area through process edge exclusion engineering. Applications include copper deposition for both advanced logic and memory interconnect. We also offer the SABRE 3D system to address TSV and WLP applications, such as copper pillar, RDL, high-density fanout, underbump metallization, bumping, and microbumps used in post-TSV processing.

Tungsten Metal Films — ALTUS® Product Family

Our ALTUS systems deposit highly conformal atomic layer films for advanced tungsten metallization applications. The patented Multi-Station Sequential Deposition (“MSSD”) architecture enables a nucleation layer to be formed using Pulsed Nucleation Layer (“PNL”) technology and bulk CVD fill to be performed in the same chamber (“in situ”). PNL®, our ALD technology, is used in the deposition of tungsten nitride films to achieve high step coverage with reduced thickness relative to conventional barrier films. PNL is also used to reduce thickness and alter CVD bulk fill grain growth, lowering the overall resistivity of thin tungsten films. The advanced ExtremeFillTM CVD and LFW (low-fluorine tungsten) ALD technologies provide extendibility to fill the most challenging structures at advanced technology nodes. Applications include tungsten plug and via fill, NVM word lines, low-stress composite interconnects, and tungsten nitride barrier for via and contact metallization.

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PECVD Dielectric Films — VECTOR® Product Family

The VECTOR family of PECVD systems delivers advanced thin film quality, wafer-to-wafer uniformity, productivity, and low cost of ownership. The MSSD architecture combines the required film performance with both sequential and parallel processing to provide flexibility for a range of applications. VECTOR products include specialized systems for logic and memory applications with multiple platform options. The Express platform offers a small footprint with four processing stations. Excel is a modular platform for advanced technology nodes where pre-and-post deposition treatments are needed. The Extreme platform accommodates up to 12 processing stations for high-throughput applications. Our Q platform accommodates up to 16 processing stations for depositing multi-stack films. Applications include deposition of oxides, nitrides, and carbides for hardmasks, multiple patterning films, anti-reflective layers, multi-layer stack films, and diffusion barriers.

ALD Dielectric Films — Striker® Product Family

The Striker family of ALD systems delivers highly conformal dielectric films for spacer-based patterning and liner applications in the most advanced memory and logic structures. The MSSD architecture combines the required film performance with both sequential and parallel processing modes to provide flexibility to deliver both precise control of critical dimensions and low cost of ownership. The unique capability to deliver tunable and high-quality films over a vast range of temperatures and process conditions allows the Striker family to deliver unique and high electrical quality films to support the most demanding logic, DRAM, NVM, and CIS applications. Striker products include specialized systems for logic and memory applications, with similar multiple platform options as are available for our VECTOR products. Applications include conformal deposition of dielectric films for spacers and liners.

Gapfill Dielectric Films — SPEED® Product Family

The SPEED HDP-CVD products are designed to provide void-free gapfill of high-quality dielectric films with superior throughput and reliability. The unique source design provides for particle performance, while the ability to customize the deposition and in situ etching profile ensures across-wafer thickness and gapfill uniformity. Together, the chamber and plasma source designs allow large batch sizes between cleans and faster cleans to deliver superior throughput. Broad process flexibility is available on the same platform, without requiring major hardware changes. Applications include shallow trench isolation (“STI”), pre-metal dielectrics, inter-layer dielectrics, inter-metal dielectrics, and passivation layers.

Film Treatment — SOLA® Product Family

The SOLA UVTP product family is used for treatment of BEOL low-k dielectric films and FEOL silicon nitride strained films. The systems incorporate a proprietary treatment process that modifies the physical characteristics of a previously deposited film through exposure to ultraviolet light, gases and vapors, and heat. The Multi-Station Sequential Processing (“MSSP”) architecture allows independent control of temperature, wavelength, and intensity at each station of the wafer path. We believe this enables delivery of best-in-class film properties, within-wafer and wafer-to-wafer uniformity, and productivity.

Plasma Etch

As the semiconductor industry continues to improve device performance and shrink critical feature sizes, plasma etch faces multiple challenges. These include processing smaller features, new materials, new transistor structures, increasingly complex film stacks, and ever higher aspect ratio structures. For conductor etch, requirements include delivering atomic-scale control for etching FinFET/3D gate transistors, multi-film stacks for high-k/metal gate structures, and multiple patterning structures. Dielectric etch processes must be able to maintain etch profiles on increasingly HAR structures such as in NVM devices, etch new multi-layer photoresist materials and amorphous carbon hardmasks, and avoid damaging fragile low-k materials. In emerging 3D ICs, TSVs are now used to provide interconnect capability for die-to-die and wafer-to-wafer stacking. Critical factors for TSV are etching a variety of materials in situ, as well as being able to use both conventional and special techniques for deep silicon etching. For all etch processes, it is important to provide excellent profile control and across-wafer uniformity while maintaining high productivity and cost efficiency.

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Conductor Etch — Kiyo® Product Family, Versys® Metal Product Family

The Kiyo product family is designed to deliver high-performance, high-productivity, low-risk solutions for conductor etch applications. Uniformity, uniformity control, and repeatability are enabled by a symmetrical chamber design, electrostatic chuck technology, and independent tuning features. The Kiyo products deliver high productivity with low defectivity on multi-film stacks, enabled by in situ etch capability, continuous plasma, and advanced Waferless Autoclean technology. To address technology inflections in patterning, the Kiyo family offers state-of-the-art capability with our Hydra® technology, which enables extraordinary within-wafer uniformity for FEOL/BEOL process modules in NVM, DRAM and logic devices. In addition, Kiyo systems can be configured to perform atomic layer etching (“ALE”), which delivers atomic-scale variability control to enable next-generation wafer processing. Applications include FinFET gate, fin definition, STI, high-k/metal gate, and multiple patterning. The Versys Metal product family provides a flexible platform for BEOL metal etch processes. Symmetrical chamber design and independent tuning features provide critical dimension, profile uniformity, and uniformity control for metal hardmask applications. The products’ proprietary chamber cleaning technology ensures high availability, high yield, and exceptional process repeatability for BEOL processing. Applications include metal hardmask, multiple patterning, high-density aluminum line, and aluminum pad. For both Kiyo and Versys Metal families, multiple platforms options are available to address fab productivity needs; these include the 2300e4®, 2300e5®, and 2300e6® platforms.

Dielectric Etch — FlexTM Product Family

The Flex product family offers differentiated technologies and application-focused capabilities for critical dielectric etch applications. Uniformity, repeatability, and tunability are enabled by a multi-frequency, small-volume, confined plasma design. The systems deliver high productivity with low defectivity, enabled by in situ multi-step etch and continuous plasma capability. Low-risk, cost-effective upgrades provide evolutionary product transitions that extend product life and maximize return on investment. Applications include low-k and ultra low-k dual damascene, mask open, and high aspect ratio applications for DRAM capacitor cell, NVM hole, trench, and contact. In addition, Flex systems can be configured to perform ALE, which delivers atomic-scale variability control to enable next-generation wafer processing for applications such as self-aligned contacts. Multiple platforms are available - including 2300e4®, 2300e5®, 2300e6® - to address fab productivity needs.

TSV Etch — Syndion® Product Family

Based on our production-proven conductor etch products, the Syndion family provides low-risk, flexible solutions to address multiple TSV and CIS etch applications. The Syndion products provide a low cost of ownership due to high etch rates, excellent repeatability, and in situ etching of multiple materials in the TSV stack (silicon, dielectrics, conducting films). The systems support both conventional single-step etch and rapidly alternating process (“RAP”). High process flexibility, superior profile control, and excellent uniformity enable successful TSV implementation for a variety of complementary metal-oxide-semiconductor 3D IC and image sensor applications. Multiple platforms are available - including 2300e4®, 2300e5®, 2300e6® - to address fab productivity needs.

Single-Wafer Clean

Wafer cleaning is a critical function that must be repeated many times during the semiconductor manufacturing process, from device fabrication through packaging. As device geometries shrink and new materials are introduced, the number of cleaning steps continues to grow. Furthermore, each step has different selectivity and defectivity requirements that add to manufacturing complexity. For next-generation devices, fragile structures need to be cleaned without being damaged. In addition, cleaning steps that target the bevel region can help eliminate the potential source of yield-limiting defects at the wafer’s edge, thereby increasing the number of good die at the wafer’s edge and improving yield.

Wet Clean — EOS®, Da Vinci®, DV-Prime®, SP Series

Single-wafer spin technology pioneered the industry transition from batch to single-wafer wet processing. These production-proven spin wet clean systems provide the productivity and flexibility needed for both high-volume manufacturing and leading-edge development across multiple technology nodes and for all device types. The products deliver process uniformity across the wafer, wafer-to-wafer, and lot-to-lot. Proprietary technologies enhance damage-free particle removal and enable wafer drying without pattern collapse or watermarks. Offering the latest in dilute chemistry and solvent systems, the products meet defectivity and material integrity requirements. Applications include particle, polymer, and residue removal; photoresist removal; wafer backside/

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bevel cleaning; and film removal. Our wet clean systems are also used for multiple wet etch and clean applications for WLP, including silicon substrate thinning, wafer stress relief, underbump metallization etch, and photoresist removal.

Plasma Bevel Clean — Coronus® Product Family

The Coronus plasma-based bevel clean products enhance die yield by removing particles, residues and unwanted films from the wafer’s edge that can impact the device area. The system combines the ability of plasma to selectively remove a wide variety of materials with a proprietary confinement technology that protects the die area. High system uptime and throughput, excellent process repeatability, and efficient in situ removal of multi-material film stacks and residues ensure high productivity for increased wafer output. Applications include post-etch, pre- and post-deposition, pre-lithography, and metal film removal to prevent arcing during plasma etch or deposition steps. It also provides a cost-effective bevel clean process to remove carbon-rich residues and films.

Legacy Products

For applications that do not require the most advanced wafer processing capability, semiconductor manufacturers can benefit from the proven performance of previous-generation products to increase their production capacity at a reduced economic investment. Purchasing through an original equipment manufacturer (“OEM”) like us minimizes the risks of unexpected costs and unpredictable time to production that are typically associated with the legacy equipment market. To meet semiconductor manufacturers’ needs for high-performance, maximum-predictability, and low-risk equipment, we provide new, refurbished, and legacy products to customers utilizing technology nodes at and above 28 nm. These products benefit from many of the technical advances from our newest systems, enabling extended lifetime and productivity. Our products also provide production-worthy, cost-effective solutions for MEMS, power semiconductor, radio frequency device, and light emitting diode (“LED”) markets.

Products Table

Market		Process/Application		Technology		Products
Thin Film Deposition		Metal Films		ECD (Copper & Other) CVD, ALD (Tungsten)		SABRE® family ALTUS® family
		Dielectric Films		PECVD ALD Gapfill HDP-CVD		VECTOR® family Striker® family SPEED® family
		Film Treatment		UVTP		SOLA® family
Plasma Etch		Conductor Etch		Reactive Ion Etch		Kiyo® family, Versys® Metal family
		Dielectric Etch		Reactive Ion Etch		FlexTM family
		TSV Etch		Deep Reactive Ion Etch		Syndion® family
Single-Wafer Clean		Wafer Cleaning		Wet Clean		EOS®, DV-Prime®, Da Vinci®, SP Series
		Bevel Cleaning		Dry Plasma Clean		Coronus® family

Fiscal Periods Presented

All references to fiscal years apply to our fiscal years, which ended June 25, 2017, June 26, 2016, and June 28, 2015.

Research and Development

The market for semiconductor capital equipment is characterized by rapid technological change and product innovation. Our ability to achieve and maintain our competitive advantage depends in part on our continued and timely development of new products and enhancements to existing products. Accordingly, we devote a significant

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portion of our personnel and financial resources to research and development (“R&D”) programs and seek to maintain close and responsive relationships with our customers and suppliers.

Our R&D expenses during fiscal years 2017, 2016, and 2015 were $1.0 billion, $914 million, and $825 million, respectively. The majority of R&D spending over the past three years has been targeted at deposition, etch, single-wafer clean, and other semiconductor manufacturing products. We believe current challenges for customers at various points in the semiconductor manufacturing process present opportunities for us.

We expect to continue to make substantial investments in R&D to meet our customers’ product needs, support our growth strategy, and enhance our competitive position.

Marketing, Sales, and Service

Our marketing, sales, and service efforts are focused on building long-term relationships with our customers and targeting product and service solutions designed to meet their needs. These efforts are supported by a team of product marketing and sales professionals as well as equipment and process engineers who work closely with individual customers to develop solutions for their wafer processing needs. We maintain ongoing service relationships with our customers and have an extensive network of service engineers in place throughout the United States, China, Europe, Japan, Korea, Southeast Asia, and Taiwan. We believe that comprehensive support programs and close working relationships with customers are essential to maintaining high customer satisfaction and our competitiveness in the marketplace.

We provide standard warranties for our systems. The warranty provides that systems will be free from defects in material and workmanship and will conform to agreed-upon specifications. The warranty is limited to repair of the defect or replacement with new or like-new equivalent goods and is valid when the buyer provides prompt notification within the warranty period of the claimed defect or non-conformity and also makes the items available for inspection and repair. We also offer extended warranty packages to our customers to purchase as desired.

International Sales

A significant portion of our sales and operations occur outside the United States and, therefore, may be subject to certain risks, including but not limited to tariffs and other barriers; difficulties in staffing and managing non-U.S. operations; adverse tax consequences; foreign currency exchange rate fluctuations; changes in currency controls; compliance with U.S. and international laws and regulations, including U.S. export restrictions; and economic and political conditions. Any of these factors may have a material adverse effect on our business, financial position, and results of operations and cash flows. For geographical reporting, revenue is attributed to the geographic location in which the customers’ facilities are located. Revenue by region was as follows:

	Year Ended
	June 25, 2017				June 26, 2016				June 28, 2015
	(in thousands)
Revenue:
Korea	$	2,480,329			$	1,057,331			$	1,406,617
Taiwan	2,095,669				1,485,037				1,084,239
Japan	1,041,969				983,821				623,575
China	1,023,195				1,039,951				661,094
United States	629,937				495,123				890,891
Southeast Asia	401,877				605,236				278,350
Europe	340,644				219,394				314,546
Total revenue	$	8,013,620			$	5,885,893			$	5,259,312

Long-Lived Assets

Refer to Note 18 of our Consolidated Financial Statements, included in Item 8 of this report, for information concerning the geographic locations of long-lived assets.

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Customers

Our customers include all of the world’s leading semiconductor manufacturers. Customers continue to establish joint ventures, alliances, and licensing arrangements which have the potential to positively or negatively impact our competitive position and market opportunities. Customers accounting for greater than 10% of total revenues in fiscal year 2017 included Micron Technology, Inc.; Samsung Electronics Company, Ltd.; SK hynix Inc.; Taiwan Semiconductor Manufacturing Company, Ltd; and Toshiba, Inc. Customers accounting for greater than 10% of total revenues in fiscal year 2016 included Micron Technology, Inc.; Samsung Electronics Company, Ltd.; SK hynix Inc.; and Taiwan Semiconductor Manufacturing Company, Ltd. Customers accounting for greater than 10% of total revenues in fiscal year 2015 included Micron Technology, Inc.; Samsung Electronics Company, Ltd.; and Taiwan Semiconductor Manufacturing Company, Ltd.

A material reduction in orders from our customers could adversely affect our results of operations and projected financial condition. Our business depends upon the expenditures of semiconductor manufacturers. Semiconductor manufacturers’ businesses, in turn, depend on many factors, including their economic capability, the current and anticipated market demand for ICs, and the availability of equipment capacity to support that demand.

Backlog

In general, we schedule production of our systems based upon our customers’ delivery requirements and forecasts. In order for a system to be included in our backlog, the following conditions must be met: (1) we have received a written customer request that has been accepted, (2) we have an agreement on prices and product specifications, and (3) there is a scheduled shipment within the next 12 months. In order for spares and services to be included in our backlog, the following conditions must be met: (1) we have received a written customer request that has been accepted and (2) delivery of products or provision of services is anticipated within the next 12 months. Where specific spare parts and customer service purchase contracts do not contain discrete delivery dates, we use volume estimates at the contract price and over the contract period, not to exceed 12 months, in calculating backlog amounts. Our policy is to revise our backlog for order cancellations and to make adjustments to reflect, among other things, changes in spares volume estimates and customer delivery date changes. As of June 25, 2017, and June 26, 2016, our backlog was $2.1 billion and $1.4 billion, respectively. Generally, orders for our products and services are subject to cancellation by our customers with limited penalties. Because some orders are received and shipped in the same quarter and because customers may change delivery dates and cancel orders, our backlog at any particular date is not necessarily indicative of business volumes or actual revenue levels for succeeding periods.

Manufacturing

Our manufacturing operations mainly consist of assembling and testing components, sub-assemblies, and modules that are then integrated into finished systems prior to shipment to or at the location of our customers. The assembly and testing of our products is conducted predominately in cleanroom environments.

We have agreements with third parties to outsource certain aspects of our manufacturing, production warehousing, and logistics functions. We believe that these outsourcing contracts provide us more flexibility to scale our operations up or down in a timely and cost-effective manner, enabling us to respond quickly to any changes in our business. We believe that we have selected reputable providers and have secured their performance on terms documented in written contracts. However, it is possible that one or more of these providers could fail to perform as we expect, and such failure could have an adverse impact on our business and have a negative effect on our operating results and financial condition. Overall, we believe we have effective mechanisms to manage risks associated with our outsourcing relationships. Refer to Note 15 of our Consolidated Financial Statements, included in Item 8 of this report, for further information concerning our outsourcing commitments.

Certain components and sub-assemblies that we include in our products may only be obtained from a single supplier. We believe that, in many cases, we could obtain and qualify alternative sources to supply these products. Nevertheless, any prolonged inability to obtain these components could have an adverse effect on our operating results and could unfavorably impact our customer relationships.

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Environmental Matters

We are subject to a variety of governmental regulations related to the management of hazardous materials that we use in our business operations. We are currently not aware of any pending notices of violations, fines, lawsuits, or investigations arising from environmental matters that would have a material effect on our business. We believe that we are generally in compliance with these regulations and that we have obtained (or will obtain or are otherwise addressing) all necessary environmental permits to conduct our business. Nevertheless, the failure to comply with present or future regulations could result in fines being imposed on us, require us to suspend production or cease operations, or cause our customers to not accept our products. These regulations could require us to alter our current operations, to acquire significant additional equipment, or to incur substantial other expenses to comply with environmental regulations. Our failure to control the use, sale, transport, or disposal of hazardous substances could subject us to future liabilities.

Employees

As of August 10, 2017, we had approximately 9,400 regular employees globally. Although we have employment-related agreements with a number of key employees, these agreements do not guarantee continued service. Each of our employees is required to comply with our policies relating to maintaining the confidentiality of our non-public information.

In the semiconductor and semiconductor capital equipment industries, competition for highly skilled employees is intense. Our future success depends, to a significant extent, upon our continued ability to attract and retain qualified employees, particularly in the R&D and customer support functions.

Competition

The semiconductor capital equipment industry is characterized by rapid change and is highly competitive throughout the world. To compete effectively, we invest significant financial resources targeted to strengthen and enhance our product and services portfolio and to maintain customer service and support locations globally. Semiconductor manufacturers evaluate capital equipment suppliers in many areas, including but not limited to process performance, productivity, defect control, customer support, and overall cost of ownership, which can be affected by many factors such as equipment design, reliability, software advancements, and similar factors. Our ability to succeed in the marketplace depends upon our ability to maintain existing products and introduce product enhancements and new products that meet customer requirements on a timely basis. In addition, semiconductor manufacturers must make a substantial investment to qualify and integrate new capital equipment into semiconductor production lines. As a result, once a semiconductor manufacturer has selected a particular supplier’s equipment and qualified it for production, the manufacturer generally maintains that selection for that specific production application and technology node as long as the supplier’s products demonstrate performance to specification in the installed base. Accordingly, we may experience difficulty in selling to a given customer if that customer has qualified a competitor’s equipment. We must also continue to meet the expectations of our installed base of customers through the delivery of high-quality and cost-efficient spare parts in the presence of competition from third-party spare parts providers.

We face significant competition with all of our products and services. Our primary competitor in the tungsten CVD, PECVD, HDP-CVD, ECD, and PVD markets is Applied Materials, Inc. In the PECVD market, in addition to Applied Materials, Inc., we also compete against ASM International and Wonik IPS. In the etch market, our primary competitors are Applied Materials, Inc., Hitatchi, Ltd., and Tokyo Electron, Ltd., and Our primary competitors in the wet clean market are Screen Holding Co., Ltd.; Semes Co., Ltd.; and Tokyo Electron, Ltd.

We face competition from a number of established and emerging companies in the industry. We expect our competitors to continue to improve the design and performance of their current products and processes, to introduce new products and processes with enhanced price/performance characteristics, and to provide more comprehensive offerings of products. If our competitors make acquisitions or enter into strategic relationships with leading semiconductor manufacturers, or other entities, covering products similar to those we sell, our ability to sell our products to those customers could be adversely affected. Strategic investments to encourage local semiconductor manufacturing and supply chain in China could increase competition from domestic equipment manufacturers in China. There can be no assurance that we will continue to compete successfully in the future.

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Patents and Licenses

Our policy is to seek patents on inventions relating to new or enhanced products and processes developed as part of our ongoing research, engineering, manufacturing, and support activities. We currently hold a number of U.S. and foreign patents covering various aspects of our products and processes. We believe that the duration of our patents generally exceeds the useful life of the technologies and processes disclosed and claimed in them. Our patents, which cover material aspects of our past and present core products, have current durations ranging from approximately one to twenty years. We believe that, although the patents we own and may obtain in the future will be of value, they alone will not determine our success. Our success depends principally upon our research and development, engineering, marketing, support, and delivery skills. However, in the absence of patent protection, we may be vulnerable to competitors who attempt to imitate our products, manufacturing techniques, and processes. In addition, other companies and inventors may receive patents that contain claims applicable or similar to our products and processes. The sale of products covered by patents of others could require licenses that may not be available on terms acceptable to us, or at all. For further discussion of legal matters, see Item 3, “Legal Proceedings,” of this report.

Executive Officers of the Company

As of August 10, 2017, the executive officers of Lam Research were as follows:

Name		Age		Title
Martin B. Anstice		50		President and Chief Executive Officer
Timothy M. Archer		50		Executive Vice President and Chief Operating Officer
Douglas R. Bettinger		50		Executive Vice President, Chief Financial Officer, and Chief Accounting Officer
Richard A. Gottscho		65		Executive Vice President, Corporate Chief Technology Officer
Patrick J. Lord		51		Group Vice President, Customer Support Business Group (“CSBG”)
Sarah A. O’Dowd		67		Senior Vice President, Chief Legal Officer and Secretary
Vahid Vahedi		51		Group Vice President, Etch Business Unit
Sesha Varadarajan		42		Group Vice President, Deposition Business Unit

Martin B. Anstice has been our president and chief executive officer since January 2012. Mr. Anstice joined us in April 2001 as senior director, operations controller, was promoted to the position of managing director and corporate controller in May 2002, and was promoted to group vice president and chief financial officer in June 2004. He was appointed executive vice president and chief operating officer in September 2008 and president in December 2010. Prior to joining us, he held various finance positions from 1988 to 1999 at Raychem Corporation, a global materials science company. Subsequent to the acquisition of Raychem by Tyco International, a global provider of engineered electronic components, network solutions, and wireless systems, he assumed responsibility for supporting mergers and acquisitions activities of Tyco Electronics. Mr. Anstice is an Associate member of the Institute of Chartered Management Accountants in the United Kingdom.

Timothy M. Archer joined us in June 2012 as our executive vice president, chief operating officer. Prior to joining us, he spent 18 years at Novellus Systems, Inc., (“Novellus”) in various technology development and business leadership roles, including most recently as chief operating officer from January 2011 to June 2012; executive vice president of Worldwide Sales, Marketing, and Customer Satisfaction from September 2009 to January 2011; and executive vice president of the PECVD and Electrofill Business Units from November 2008 to September 2009. His tenure at Novellus also included assignments as senior director of technology for Novellus Systems Japan from 1999 to 2001 and senior director of technology for the Electrofill Business Unit from April 2001 to April 2002. He started his career in 1989 at Tektronix, where he was responsible for process development for high-speed bipolar ICs. Mr. Archer completed the Program for Management Development at the Harvard Graduate School of Business and earned a B.S. degree in applied physics from the California Institute of Technology.

Douglas R. Bettinger is our executive vice president, chief financial officer, and chief accounting officer with responsibility for finance, tax, treasury, information technology, and investor relations. Prior to joining the Company in 2013, Mr. Bettinger served as senior vice president and chief financial officer of Avago Technologies

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from 2008 to 2013. From 2007 to 2008, he served as vice president of Finance and corporate controller at Xilinx, Inc., and from 2004 to 2007, he was chief financial officer at 24/7 Customer, a privately held company. Mr. Bettinger worked at Intel Corporation from 1993 to 2004, where he held several senior-level finance positions, including corporate planning and reporting controller and Malaysia site operations controller. Mr. Bettinger earned an M.B.A. degree in finance from the University of Michigan and a B.S. degree in economics from the University of Wisconsin in Madison.

Richard A. Gottscho is our executive vice president, corporate chief technology officer, a position he has held since May 2017. Prior to that time, he had been executive vice president, Global Products Group beginning in August 2010; and group vice president and general manager, Etch Businesses beginning in March 2007. He joined us in January 1996 and has served at various director and vice president levels in support of etch products, CVD products, and corporate research. Prior to joining us, he was a member of Bell Laboratories for 15 years, where he started his career working in plasma processing. During his tenure at Bell, he headed research departments in electronics materials, electronics packaging, and flat panel displays. He is the author of numerous papers, patents, and lectures in plasma processing and process control. He is a recipient of the American Vacuum Society’s Peter Mark Memorial Award and Plasma Science and Technology Division Prize, the Gaseous Electronics Conference Foundation Lecturer, the Dry Process Symposium Nishizawa Award, and the Tegal Thinker Award. He is a fellow of the American Physical and American Vacuum Societies, has served on numerous editorial boards of refereed technical publications and program committees for major conferences in plasma science and engineering, and was vice-chair of a National Research Council study on plasma science in the 1980s. In 2016, Dr. Gottscho was elected to the U.S. National Academy of Engineering. Dr. Gottscho earned Ph.D. and B.S. degrees in physical chemistry from the Massachusetts Institute of Technology and Pennsylvania State University, respectively.

Patrick J. Lord is our group vice president and general manager of the Customer Support Business Group, a position he has held since December 2016. Previously, Dr. Lord held the position of group vice president and deputy general manager of the Global Products Group from September 2013 to December 2016. He served as the head of the Direct Metals, GapFill, Surface Integrity Group, and Integrated Metals (“DGSI”) Business Units between June 2012 and September 2013. Prior to the acquisition of Novellus in June 2012, Dr. Lord was senior vice president and general manager of the DGSI Business Units at Novellus. Additionally, Dr. Lord held the position of senior vice president of Business Development and Strategic Planning. He joined Novellus in 2001 and held a number of other positions, including executive vice president and general manager of the CMP Business Unit, senior director of Business Development, senior director of Strategic Marketing, and acting vice president of Corporate Marketing. Before joining Novellus, Dr. Lord spent six years at KLA-Tencor Corporation (“KLA-Tencor”) in various product marketing and management roles. He earned his Ph.D., M.S., and B.S. degrees in mechanical engineering from the Massachusetts Institute of Technology.

Sarah A. O’Dowd is our senior vice president, chief legal officer and secretary. She joined us in September 2008 as group vice president and chief legal officer, responsible for general legal matters, intellectual property and ethics, and compliance. In addition to her Legal function, in April 2009 she was appointed vice president of Human Resources and served in this dual capacity through May 2012. Prior to joining us, she was vice president and general counsel for FibroGen, Inc., from February 2007 until September 2008. Until February 2007, Ms. O’Dowd was a shareholder in the law firm of Heller Ehrman LLP for more than 20 years, practicing in the areas of corporate securities, governance, and mergers and acquisitions for a variety of clients, principally publicly traded high-technology companies. She served in a variety of leadership and management roles at Heller Ehrman, including managing partner of the Silicon Valley and San Diego offices, member of the firm’s Policy Committee, and, as head of the firm’s business practice groups, a member of the firm’s Executive Committee. Ms. O’Dowd earned her J.D. and M.A. degrees in communications from Stanford Law School and Stanford University, respectively, and her B.A. degree in mathematics from Immaculata College.

Vahid Vahedi is our group vice president of the Etch Business Unit, a position he has held since March 2012. Previously, he served as vice president of Etch Business Product Management and Marketing, vice president of Dielectric Etch, vice president of Conductor and 3DIC Etch, and director of Conductor Etch Technology Development. He joined us in 1995. He earned his Ph.D., M.S., and B.S. degrees in electrical engineering and computer science from the University of California at Berkeley.

Sesha Varadarajan is our group vice president of the Deposition Business Unit, a position he has held since September 2013. Previously, he served as the head of the PECVD/Electrofill Business Unit between June 2012

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and September 2013. Prior to joining us, Mr. Varadarajan was senior vice president and general manager of Novellus’ PECVD and Electrofill Business Units. He joined Novellus in 1999 as a process engineer with the Electrofill Business Unit and held various roles in that business unit before being appointed director of technology in 2004. Between 2006 and 2008, he worked in the PECVD Business Unit, initially as director of technology, until being promoted to product general manager. In 2009, he returned to the Electrofill Business Unit as vice president and general manager. In mid-2011, he was promoted to senior vice president and general manager, where he was also responsible for the PECVD Business Unit. Mr. Varadarajan earned an M.S. degree in manufacturing engineering and material science from Boston University and a B.S. degree in mechanical engineering from the University of Mysore.