Item 1. Business

Incorporated in 1980, Lam Research Corporation (“Lam Research,” “Lam,” “we,” “our,” “us,” or the “Company”) is a Delaware corporation, headquartered in Fremont, California. We maintain a network of facilities throughout Asia, Europe, and the United States in order to meet the needs of our dynamic customer base.

Additional information about Lam Research is available on our website at www.lamresearch.com. The content on any website referred to in this Form 10-K is not a part of or incorporated by reference in this Form 10-K unless expressly noted.

Our Annual Report on Form 10-K, Quarterly Reports on Forms 10-Q, Current Reports on Forms 8-K, Proxy Statements and all other filings we make with the SEC are available on our website, free of charge, as soon as reasonably practical after we file them with or furnish them to the SEC and are also available online at the SEC’s website at www.sec.gov.

The Lam Research logo, Lam Research, and all product and service names used in this report are either registered trademarks or trademarks of Lam Research Corporation or its subsidiaries in the United States and/or other countries. All other marks mentioned herein are the property of their respective holders.

We are a global supplier of innovative wafer fabrication equipment and services to the semiconductor industry. We have built a strong global presence with core competencies in areas like nanoscale applications enablement, chemistry, plasma and fluidics, advanced systems engineering and a broad range of operational disciplines. Our products and services are designed to help our customers build smaller, faster, and better performing devices that are used in a variety of electronic products, including mobile phones, personal computers, servers, wearables, automotive vehicles, and data storage devices.

Our customer base includes leading semiconductor memory, foundry, and integrated device manufacturers (“IDMs”) that make products such as non-volatile memory (“NVM”), dynamic random-access memory (“DRAM”), and logic devices. We aim to increase our strategic relevance with our customers by contributing more to their continued success. Our core technical competency is integrating hardware, process, materials, software, and process control enabling results on the wafer.

Semiconductor manufacturing, our customers’ business, involves the complete fabrication of multiple dies or integrated circuits (“ICs”) on a wafer. This involves the repetition of a set of core processes and can require hundreds of individual steps. Fabricating these devices requires highly sophisticated process technologies to integrate an increasing array of new materials with precise control at the atomic scale. Along with meeting technical requirements, wafer processing equipment must deliver high productivity and be cost-effective.

Demand from cloud computing (the “Cloud”), the Internet of Things (“IoT”), and other markets is driving the need for increasingly powerful and cost-efficient semiconductors. At the same time, there are growing technical challenges with traditional two-dimensional scaling. These trends are driving significant inflections in semiconductor manufacturing, such as the increasing importance of vertical scaling strategies like three-dimensional (“3D”) architectures as well as multiple patterning to enable shrinks.

We believe we are in a strong position with our leadership and competency in deposition, etch, and clean to facilitate some of the most significant innovations in semiconductor device manufacturing. Several factors create opportunity for sustainable differentiation for us: (i) our focus on research and development, with several on-going programs relating to sustaining engineering, product and process development, and concept and feasibility; (ii) our ability to effectively leverage cycles of learning from our broad installed base; (iii) our collaborative focus with semi-ecosystem partners; (iv) our ability to identify and invest in the breadth of our product portfolio to meet technology inflections; and (v) our focus on delivering our multi-product solutions with a goal to enhance the value of Lam’s solutions to our customers.

We also address processes for back-end wafer-level packaging (“WLP”), which is an alternative to traditional wire bonding and can offer a smaller form factor, increased interconnect speed and bandwidth, and lower power consumption, among other benefits. In addition, our products are well-suited for related markets that rely on semiconductor processes and require production-proven manufacturing capability, such as complementary metal-oxide-semiconductor image sensors (“CIS”) and micro-electromechanical systems (“MEMS”).

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Our Customer Support Business Group (“CSBG”) provides products and services to maximize installed equipment performance, predictability, and operational efficiency. We offer a broad range of services to deliver value throughout the lifecycle of our equipment, including customer service, spares, upgrades, and new and refurbished non-leading edge products in our deposition, etch, and clean markets. Many of the technical advances that we introduce in our newest products are also available as upgrades, which provide customers with a cost-effective strategy for extending the performance and capabilities of their existing wafer fabrication lines. Service offerings include addressing productivity needs for our customers including, but not limited to, system uptime or availability optimization, throughput improvements, and defect reduction. Additionally, within CSBG, our Reliant product line offers new and refurbished non-leading-edge products in deposition, etch and clean markets for those applications that do not require the most advanced wafer processing capability.

Products

Market		Process/Application		Technology		Products
Deposition		Metal Films		Electrochemical Deposition (“ECD”) (Copper & Other)		SABRE® family
				Chemical Vapor Deposition (“CVD”) Atomic Layer Deposition (“ALD”) (Tungsten)		ALTUS® family
		Dielectric Films		Plasma-enhanced CVD (“PECVD”) ALD Gapfill High-Density Plasma CVD (“HDP-CVD”)		VECTOR® family Striker® family SPEED® family
		Film Treatment		Ultraviolet Thermal Processing (“ULTP”)		SOLA® family
Etch		Conductor Etch		Reactive Ion Etch		Kiyo® family, Versys® Metal family
		Dielectric Etch		Reactive Ion Etch		Flex® family
		Through-silicon Via (“TSV”) Etch		Deep Reactive Ion Etch		Syndion® family
Clean		Wafer Cleaning		Wet Clean		EOS®, DV-Prime®, Da Vinci®, SP Series
		Bevel Cleaning		Dry Plasma Clean		Coronus® family
Mass Metrology		Deposition, Etch, Clean		Sub-milligram Mass Measurement		Metryx® Family

Deposition Processes and Product Families

Deposition processes create layers of dielectric (insulating) and metal (conducting) materials used to build a semiconductor device. Depending on the type of material and structure being made, different techniques are employed. Electrochemical deposition creates the copper wiring (interconnect) that links devices in an integrated circuit (“IC” or “chip”). Plating of copper and other metals is also used for TSV and WLP applications. Tiny tungsten connectors and thin barriers are made with the precision of chemical vapor deposition and atomic layer deposition, which adds only a few layers of atoms at a time. Plasma-enhanced CVD, high-density plasma CVD, and ALD are used to form the critical insulating layers that isolate and protect all of these electrical structures. Lastly, post-deposition treatments such as ultraviolet thermal processing are used to improve dielectric film properties.

ALTUS® Product Family

Tungsten deposition is used to form conductive features such as contacts, vias, and wordlines on a chip. These features are small, often narrow, and use only a small amount of metal, so minimizing resistance and achieving complete fill can be difficult. At these nanoscale dimensions, even slight imperfections can impact device performance or cause a chip to fail. Our ALTUS® systems combine CVD and ALD technologies to deposit the highly conformal films needed for advanced tungsten metallization applications. The Multi-Station Sequential Deposition architecture enables nucleation layer formation and bulk CVD fill to be performed in the same

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chamber (“in situ”). Our ALD technologies are used in the deposition of barrier films to achieve high step coverage with reduced thickness at lower temperatures relative to a conventional process.

SABRE® Product Family

Copper deposition lays down the electrical wiring for most semiconductor devices. Even the smallest defect - say, a microscopic pinhole or dust particle - in these conductive structures can impact device performance, from loss of speed to complete failure. The SABRE*®* ECD product family, which helped pioneer the copper interconnect transition, offers the precision needed for copper damascene manufacturing in logic and memory. System capabilities include cobalt deposition for logic applications and copper deposition directly on various liner materials, which is important for next-generation metallization schemes. For advanced WLP applications, such as forming conductive bumps and redistribution layers, and for filling TSVs, the SABRE® 3D family combines Lam’s SABRE Electrofill® technology with additional innovation to deliver the high-quality films needed at high productivity. The modular architecture can be configured with multiple plating and pre/post-treatment cells, providing flexibility to address a variety of packaging applications.

SOLA® Product Family

Dielectric materials designed to meet the insulation requirements of logic chips often have attributes that make them unusually difficult to use. These films are easily damaged and vulnerable to losing some of their insulating capability, which can lead to poor device performance. To enable these applications, some films can be stabilized - and others enhanced to improve device performance - using specialized post-deposition film treatments available with Lam’s SOLA® UVTP product family. SOLA® products offer process flexibility through independent control of temperature, wavelength, and intensity at each station of the wafer path, enabled by Multi-Station Sequential Processing architecture.

SPEED® Product Family

Dielectric gapfill processes deposit critical insulation layers between conductive and/or active areas by filling openings of various aspect ratios between conducting lines and between devices. With advanced devices, the structures being filled can be very tall and narrow. As a result, high-quality dielectric films are especially important due to the ever-increasing possibility of cross-talk and device failure. Our SPEED*®* HDP-CVD products provide a multiple dielectric film solution for high-quality gapfill with industry-leading throughput and reliability. SPEED*®* products have excellent particle performance, and their design allows large batch sizes between cleans and faster cleans.

Striker® Product Family

The latest memory, logic, and imaging devices require extremely thin, highly conformal dielectric films for continued device performance improvement and scaling. For example, ALD films are critical for spacer-based multiple patterning schemes where the spacers help define critical dimensions, as well as for insulating liners and gapfill in high aspect ratio features, which have little tolerance for voids and even the smallest defect. The Striker® single-wafer ALD products provide dielectric film solutions for these challenging requirements through application-specific material, process and hardware options that deliver film technology and defect performance.

VECTOR® Product Family

Dielectric film deposition processes are used to form some of the most difficult-to-produce insulating layers in a semiconductor device, including those used in the latest transistors and 3D structures. In some applications, these films require dielectric films to be exceptionally smooth and defect free since slight imperfections are multiplied greatly in subsequent layers. Our VECTOR® PECVD products are designed to provide the performance and flexibility needed to create these enabling structures within a wide range of challenging device applications. As a result of its design, VECTOR® produces superior thin film quality, along with exceptional within-wafer and wafer-to-wafer uniformity.

Etch Processes and Product Families

Etch processes help create chip features by selectively removing both dielectric (insulating) and metal (conducting) materials that have been added during deposition. These processes involve fabricating increasingly

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small, complex, and narrow features using many types of materials. The primary technology, reactive ion etch, bombards the wafer surface with ions (charged particles) to remove material. For the smallest features, atomic-layer etching (“ALE”) removes a few atomic layers of material at a time. While conductor etch processes precisely shape critical electrical components like transistors, dielectric etch forms the insulating structures that protect conducting parts.

Flex® Product Family

Dielectric etch carves patterns in insulating materials to create barriers between the electrically conductive parts of a semiconductor device. For advanced devices, these structures can be extremely tall and thin and involve complex, sensitive materials. Slight deviations from the target feature profile - even at the atomic level - can negatively affect electrical properties of the device. To precisely create these challenging structures, our Flex® product family offers differentiated technologies and application-focused capabilities for critical dielectric etch applications. Uniformity, repeatability, and tunability are enabled by a unique multi-frequency, small-volume, confined plasma design. Flex® offers in situ multi-step etch and continuous plasma capability that delivers high productivity with low defectivity.

Kiyo® Product Family

Conductor etch helps shape the electrically active materials used in the parts of a semiconductor device. Even a slight variation in these miniature structures can create an electrical defect that impacts device performance. In fact, these structures are so tiny that etch processes are pushing the boundaries of the basic laws of physics and chemistry. Our Kiyo® product family delivers the high-performance capabilities needed to precisely and consistently form these conductive features with high productivity. Proprietary Hydra technology in Kiyo*®* products improves critical dimension (“CD”) uniformity by correcting for incoming pattern variability, and atomic-scale variability control with production-worthy throughput is achieved with plasma-enhanced ALE capability.

Syndion® Product Family

Plasma etch processes used to remove single crystal silicon and other materials deep into the wafer are collectively referred to as deep silicon etch. These may be deep trenches for CMOS image sensors, trenches for power and other devices, TSVs, and other high aspect ratio features. These are created by etching through multiple materials sequentially, where each new material involves a change in the etch process. The Syndion® etch product family is optimized for deep silicon etch, providing the fast process switching with depth and cross-wafer uniformity control required to achieve precision etch results. The systems support both conventional single-step etch and rapidly alternating process, which minimizes damage and delivers precise depth uniformity.

Versys® Metal Product Family

Metal etch processes play a key role in connecting the individual components that form an IC, such as forming wires and electrical connections. These processes can also be used to drill through metal hardmasks that pattern features too small for conventional masks, allowing continued shrinking of feature dimensions. To enable these critical etch steps, the Versys® Metal product family provides high-productivity capability on a flexible platform. Superior CD and profile uniformity are enabled by a symmetrical chamber design with independent process tuning features.

Clean Processes and Product Families

Clean techniques are used between manufacturing steps to clear away particles, contaminants, residues and other unwanted material that could later lead to defects and to prepare the wafer surface for subsequent processing. Wet processing technologies can be used for wafer cleaning and etch applications. Plasma bevel cleaning is used to enhance die yield by removing unwanted materials from the wafer’s edge that could impact the device area.

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Coronus® Product Family

Bevel cleaning removes unwanted masks, residues, and films from the edge of a wafer between manufacturing steps. If not cleaned, these materials become defect sources. For instance, they can flake off and re-deposit on the device area during subsequent processes. Even a single particle that lands on a critical part of a device can ruin the entire chip. By inserting bevel clean processes at strategic points, these potential defect sources can be eliminated and more functional chips produced. By combining the precise control and flexibility of plasma with technology that protects the active die area, the Coronus® bevel clean family cleans the wafer’s edge to enhance die yield. The systems provide active die area protection by using plasma processing with proprietary confinement technology. Applications include post-etch, pre- and post-deposition, pre-lithography, and metal film removal to prevent arcing during plasma etch or deposition steps.

DV-Prime®, Da Vinci®, EOS®, and SP Series Product Families

Wafer cleaning is performed repeatedly during semiconductor device manufacturing and is a critical process that affects product yield and reliability. Unwanted microscopic materials - some no bigger than the tiny structures themselves - need to be cleaned effectively. At the same time, these processes must selectively remove residues that are chemically similar to the device films. For advanced WLP, the wet clean steps used between processes that form the package and external wiring have surprisingly complex requirements. These processes are called on to completely remove specific materials and leave other fragile structures undisturbed. In IoT products that include power devices, MEMS and image sensors, there is a unique requirement for wafer backside wet etch to uniformly thin the silicon wafer while protecting the device side of the wafer.

Based on our pioneering single-wafer spin technology, the DV-Prime® and Da Vinci® products provide the process flexibility needed with high productivity to address a wide range of wafer cleaning steps throughout the manufacturing process flow. As the latest of Lam’s wet clean products, EOS® delivers exceptionally low on-wafer defectivity and high throughput to address progressively demanding wafer cleaning applications, including emerging 3D structures. With a broad range of process capability, our SP Series products deliver cost-efficient, production-proven wet clean and silicon wet etch solutions for challenging WLP and IoT applications.

Mass Metrology Processes and Product

Mass metrology measures the change in mass following deposition, etch, and clean processes to enable monitoring and control of these often-repeated core manufacturing steps. For design components like thin film stacks, high aspect-ratio structures, and complex 3D architectures, optical techniques are limited in their ability to measure accurately the thick, deep, or otherwise visually obscured features. Measuring the change in mass for these applications provides a straightforward high-precision solution for monitoring and control of the critical features in advanced device structures, where there is often little tolerance for variation. Our line of high-precision mass metrology systems provides in-line monitoring and control of deposition, etch, and clean steps in real time - recording minute changes in mass to enable advanced detection of potential process excursions.

Metryx*®* Product Family

Metryx*®* mass metrology systems provide high precision in-line mass measurement for semiconductor wafer manufacturing. Nearly all semiconductor processes (e.g., deposition, etch and clean) either add or remove materials from the wafer. Measuring mass change of a wafer before and after a process therefore is a simple and direct means of monitoring and controlling the process. It is used to identify production wafer trends and excursions as they occur, allowing corrections to be implemented quickly to prevent further yield loss. It has been adopted in the production of 3D devices where traditional metrology and inspection techniques are insufficient for complex high aspect ratio device architectures. Mass metrology is also increasingly used to characterize multi-step processes and integrations for development, technology transfer, and diagnosis.

Fiscal Periods Presented

All references to fiscal years apply to our fiscal years, which ended June 28, 2020, June 30, 2019, and June 24, 2018.

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Research and Development

The market for semiconductor capital equipment is characterized by rapid technological change and product innovation. Our ability to achieve and maintain our competitive advantage depends in part on our continued and timely development of new products and enhancements to existing products. Accordingly, we devote a significant portion of our personnel and financial resources to research and development (“R&D”) programs and seek to maintain close and responsive relationships with our customers and suppliers.

We believe current challenges for customers at various points in the semiconductor manufacturing process present opportunities for us. We expect to continue to make substantial investments in R&D to meet our customers’ product needs, support our growth strategy and enhance our competitive position.

Marketing, Sales, and Service

Our marketing, sales, and service efforts are focused on building long-term relationships with our customers and targeting product and service solutions designed to meet their needs. These efforts are supported by a team of product marketing and sales professionals as well as equipment and process engineers who work closely with individual customers to develop solutions for their wafer processing needs. We maintain ongoing service relationships with our customers and have an extensive network of service engineers in place throughout the United States, China, Europe, India, Japan, Korea, Southeast Asia, and Taiwan. We believe that comprehensive support programs and close working relationships with customers are essential to maintaining high customer satisfaction and our competitiveness in the marketplace.

We provide standard warranties for our systems. The warranty provides that systems will be free from defects in material and workmanship and will conform to agreed-upon specifications. The warranty is limited to repair of the defect or replacement with new or like-new equivalent goods and is valid when the buyer provides prompt notification within the warranty period of the claimed defect or non-conformity and also makes the items available for inspection and repair. We also offer extended warranty packages to our customers to purchase as desired.

International Sales

A significant portion of our sales and operations occur outside the United States (“U.S.”) and, therefore, may be subject to certain risks, including but not limited to tariffs and other barriers; difficulties in staffing and managing non-U.S. operations; adverse tax consequences; foreign currency exchange rate fluctuations; changes in currency controls; compliance with U.S. and international laws and regulations, including U.S. export restrictions; and economic and political conditions. Any of these factors may have a material adverse effect on our business, financial position, and results of operations and cash flows. For geographical reporting, revenue is attributed to the geographic location in which the customers’ facilities are located. Refer to Note 20 of our Consolidated Financial Statements, included in Item 8 of this report, for the attribution of revenue by geographic region.

Long-lived Assets

Refer to Note 20 of our Consolidated Financial Statements, included in Item 8 of this report, for information concerning the geographic locations of long-lived assets.

Customers

Our customers include all of the world’s leading semiconductor manufacturers. Customers continue to establish joint ventures, alliances, and licensing arrangements which have the potential to positively or negatively impact our competitive position and market opportunities. Customers accounting for greater than 10% of total revenues in fiscal year 2020 included Micron Technology, Inc.; Samsung Electronics Company, Ltd.; SK hynix Inc.; and Taiwan Semiconductor Manufacturing Company. Customers accounting for greater than 10% of total revenues in fiscal year 2019 included Micron Technology, Inc.; Samsung Electronics Company, Ltd.; SK hynix Inc.; and Toshiba Memory Holding Corporation (presently known as Kioxia Corporation). Customers accounting for greater than 10% of total revenues in fiscal year 2018 included Intel Corporation; Micron Technology, Inc.; Samsung Electronics Company, Ltd.; SK hynix Inc.; and Toshiba Memory Corporation (presently known as Kioxia Corporation).

A material reduction in orders from our customers could adversely affect our results of operations and projected financial condition. Our business depends upon the expenditures of semiconductor manufacturers.

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Semiconductor manufacturers’ businesses, in turn, depend on many factors, including their economic capability, the current and anticipated market demand for ICs, and the availability of equipment capacity to support that demand.

Backlog

In general, we schedule production of our systems based upon our customers’ delivery requirements and forecasts. In order for a system to be included in our backlog, the following conditions must be met: (1) we have received a written customer request that has been accepted, (2) we have an agreement on prices and product specifications, and (3) there is a scheduled shipment within the next 12 months. In order for spares and services to be included in our backlog, the following conditions must be met: (1) we have received a written customer request that has been accepted and (2) delivery of products or provision of services is anticipated within the next 12 months. Where specific spare parts and customer service purchase contracts do not contain discrete delivery dates, we use volume estimates at the contract price and over the contract period, not to exceed 12 months, in calculating backlog amounts. Our policy is to revise our backlog for order cancellations and to make adjustments to reflect, among other things, changes in spares volume estimates and customer delivery date changes. As of June 28, 2020, and June 30, 2019, our backlog was $2.9 billion and $1.6 billion, respectively. Generally, orders for our products and services are subject to cancellation by our customers with limited penalties. Because some orders are received and shipped in the same quarter and because customers may change delivery dates and cancel orders, our backlog at any particular date is not necessarily indicative of business volumes or actual revenue levels for succeeding periods.

Manufacturing

Our manufacturing operations mainly consist of assembling and testing components, sub-assemblies, and modules that are then integrated into finished systems prior to shipment to or at the location of our customers. The assembly and testing of our products is conducted predominately in cleanroom environments.

We have agreements with third parties to outsource certain aspects of our manufacturing, production warehousing, and logistics functions. These outsourcing contracts provide us more flexibility to scale our operations up or down in a timely and cost-effective manner, enabling us to respond quickly to any changes in our business. We believe that we have selected reputable providers and have secured their performance on terms documented in written contracts. However, it is possible that one or more of these providers could fail to perform as we expect, and such failure could have an adverse impact on our business and have a negative effect on our operating results and financial condition. Overall, we believe we have effective mechanisms to manage risks associated with our outsourcing relationships. Refer to Note 17 of our Consolidated Financial Statements, included in Item 8 of this report, for further information concerning our outsourcing commitments, reported as a component of purchase obligations.

Certain components and sub-assemblies that we include in our products may only be obtained from a single supplier. We believe that, in many cases, we could obtain and qualify alternative sources to supply these products. Nevertheless, any prolonged inability to obtain these components could have an adverse effect on our operating results and could unfavorably impact our customer relationships.

Environmental Matters

We are subject to a variety of governmental regulations related to the management of hazardous materials that we use in our business operations. We are currently not aware of any pending notices of violations, fines, lawsuits, or investigations arising from environmental matters that would have a material effect on our business. We believe that we are generally in compliance with these regulations and that we have obtained (or will obtain or are otherwise addressing) all necessary environmental permits to conduct our business. Nevertheless, the failure to comply with present or future regulations could result in fines being imposed on us, require us to suspend production or cease operations, or cause our customers to not accept our products. These regulations could require us to alter our current operations, to acquire significant additional equipment, or to incur substantial other expenses to comply with environmental regulations. Our failure to control the use, sale, transport, or disposal of hazardous substances could subject us to future liabilities.

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Employees

As of August 13, 2020, we had approximately 11,300 regular employees globally. Although we have employment-related agreements with a number of key employees, these agreements do not guarantee continued service. Each of our employees is required to comply with our policies relating to maintaining the confidentiality of our non-public information. As noted previously, we outsource certain aspects of our manufacturing, field service, production warehousing, and logistics functions to provide us more flexibility to scale our operations up or down in a timely and cost-effective manner, enabling us to respond quickly to any changes in our business.

In the semiconductor and semiconductor capital equipment industries, competition for highly skilled employees is intense. Our future success depends, to a significant extent, upon our continued ability to attract and retain qualified employees, particularly in the R&D and customer support functions.

Competition

The semiconductor capital equipment industry is characterized by rapid change and is highly competitive throughout the world. To compete effectively, we invest significant financial resources targeted to strengthen and enhance our product and services portfolio and to maintain customer service and support locations globally. Semiconductor manufacturers evaluate capital equipment suppliers in many areas, including but not limited to process performance, productivity, defect control, customer support, and overall cost of ownership, which can be affected by many factors such as equipment design, reliability, software advancements, and similar factors. Our ability to succeed in the marketplace depends upon our ability to maintain existing products and introduce product enhancements and new products that meet customer requirements on a timely basis. In addition, semiconductor manufacturers must make a substantial investment to qualify and integrate new capital equipment into semiconductor production lines. As a result, once a semiconductor manufacturer has selected a particular supplier’s equipment and qualified it for production, the manufacturer generally maintains that selection for that specific production application and technology node as long as the supplier’s products demonstrate performance to specification in the installed base. Accordingly, we may experience difficulty in selling to a given customer if that customer has qualified a competitor’s equipment. We must also continue to meet the expectations of our installed base of customers through the delivery of high-quality and cost-efficient spare parts in the presence of competition from third-party spare parts providers.

We face significant competition with all of our products and services. Our primary competitor in the dielectric and metals deposition market is Applied Materials, Inc. For ALD and PECVD, we also compete against ASM International and Wonik IPS. In the etch market, our primary competitors are Applied Materials, Inc.; Hitachi, Ltd.; and Tokyo Electron, Ltd., and our primary competitors in the wet clean market are Screen Holding Co., Ltd.; Semes Co., Ltd.; and Tokyo Electron, Ltd.

We face competition from a number of established and emerging companies in the industry. We expect our competitors to continue to improve the design and performance of their current products and processes, to introduce new products and processes with enhanced price/performance characteristics, and to provide more comprehensive offerings of products. If our competitors make acquisitions or enter into strategic relationships with leading semiconductor manufacturers, or other entities, covering products similar to those we sell, our ability to sell our products to those customers could be adversely affected. Strategic investments to encourage local semiconductor manufacturing and supply chain in China could increase competition from domestic equipment manufacturers in China. There can be no assurance that we will continue to compete successfully in the future.

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Patents and Licenses

Our policy is to seek patents on inventions relating to new or enhanced products and processes developed as part of our ongoing research, engineering, manufacturing, and support activities. We currently hold a number of U.S. and foreign patents and applications covering various aspects of our products and processes. Our patents, which cover material aspects of our past and present core products, have current durations ranging from approximately one to twenty years. We believe that, although the patents we own and may obtain in the future will be of value, they alone will not determine our success. Our success depends principally upon our research and development, engineering, marketing, support, and delivery skills. However, in the absence of patent protection, we may be vulnerable to competitors who attempt to imitate our products, manufacturing techniques, and processes. In addition, other companies and inventors may receive patents that contain claims applicable to our products and processes. The sale of products covered by patents of others could require licenses that may not be available on terms acceptable to us, or at all. For further discussion of legal matters, see Item 3, “Legal Proceedings,” of this report.

Information about our Executive Officers

As of August 13, 2020, the executive officers of Lam Research were as follows:

Name		Age		Title
Timothy M. Archer		53		President and Chief Executive Officer
Douglas R. Bettinger		53		Executive Vice President, Chief Financial Officer, and Chief Accounting Officer
Richard A. Gottscho		68		Executive Vice President, Chief Technology Officer
Ava M. Hahn		47		Senior Vice President, Chief Legal Officer and Secretary
Kevin D. Jennings		55		Senior Vice President, Global Operations
Patrick J. Lord		54		Senior Vice President and General Manager, CSBG
Scott G. Meikle		58		Senior Vice President, Global Customer Operations
Vahid Vahedi		54		Senior Vice President and General Manager, Etch Business Unit
Seshasayee (Sesha) Varadarajan		45		Senior Vice President and General Manager, Deposition Business Unit

Timothy M. Archer has been our president and chief executive officer since December 2018. Prior to this, he served as our president and chief operating officer, from January 2018 to November 2018. Mr. Archer joined us in June 2012 as our executive vice president, chief operating officer. Prior to joining us, he spent 18 years at Novellus Systems, Inc., (“Novellus”) in various technology development and business leadership roles, including most recently as chief operating officer from January 2011 to June 2012; executive vice president of Worldwide Sales, Marketing, and Customer Satisfaction from September 2009 to January 2011; and executive vice president of the PECVD and Electrofill Business Units from November 2008 to September 2009. His tenure at Novellus also included assignments as senior director of technology for Novellus Systems Japan from 1999 to 2001 and senior director of technology for the Electrofill Business Unit from April 2001 to April 2002. He started his career in 1989 at Tektronix, where he was responsible for process development for high-speed bipolar ICs. Mr. Archer completed the Program for Management Development at the Harvard Graduate School of Business and earned a B.S. degree in applied physics from the California Institute of Technology.

Douglas R. Bettinger is our executive vice president, chief financial officer, and chief accounting officer with responsibility for Finance, Tax, Treasury, Information Technology, and Investor Relations. Prior to joining the Company in 2013, Mr. Bettinger served as senior vice president and chief financial officer of Avago Technologies from 2008 to 2013. From 2007 to 2008, he served as vice president of Finance and corporate controller at Xilinx, Inc., and from 2004 to 2007, he was chief financial officer at 24/7 Customer, a privately held company. Mr. Bettinger worked at Intel Corporation from 1993 to 2004, where he held several senior-level finance positions, including corporate planning and reporting controller and Malaysia site operations controller. Mr. Bettinger earned an M.B.A. degree in finance from the University of Michigan and a B.S. degree in economics from the University of Wisconsin in Madison.

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Richard A. Gottscho is our executive vice president, chief technology officer, a position he has held since May 2017. Dr. Gottscho previously served as executive vice president, Global Products Group beginning in August 2010; and group vice president and general manager, Etch Businesses beginning in March 2007**.** He joined us in January 1996 and has held various director and vice president roles spanning across deposition, etch, and clean products. Prior to joining us, he was a member of Bell Laboratories for 15 years, where he headed research departments in electronics materials, electronics packaging, and flat panel displays. In 2016, Dr. Gottscho was elected to the U.S. National Academy of Engineering. He is the recipient of many awards, including the American Vacuum Society’s Peter Mark Memorial Award, the Plasma Science and Technology Division Prize, the Dry Process Symposium Nishizawa Award, and the Tegal Thinker Award. He is a fellow of the American Physical and American Vacuum Societies. He has authored numerous papers, patents, and lectures, and has served on editorial boards of peer-reviewed technical publications and program committees for major conferences in plasma science and engineering. He served as vice-chair of a National Research Council study on plasma science. Dr. Gottscho earned Ph.D. and B.S. degrees in physical chemistry from the Massachusetts Institute of Technology and Pennsylvania State University, respectively.

Ava M. Hahn is our senior vice president, chief legal officer and secretary. She joined the Company in January 2020 and is responsible for global legal matters. Prior to joining us, Ms. Hahn served as executive vice president, chief compliance officer, general counsel and secretary of CA Technologies, an enterprise software company, from February 2019 to November 2019 (until its acquisition by Broadcom Corp.), general counsel and secretary of Aruba Networks, a provider of networking products, from April 2013 to June 2016 (until its acquisition by Hewlett Packard Enterprise), general counsel and secretary of ShoreTel, Inc. from 2007 to 2013, and general counsel and secretary of Genesis Microchip from 2002 to 2007. Ms. Hahn also served as general counsel of venture capital firms Kleiner Perkins and Felicis Ventures. She started her career at the law firm of Wilson Sonsini Goodrich & Rosati, where she practiced corporate and securities law. Ms. Hahn earned a J.D. from Columbia Law School and a B.A. in history from the University of California, Berkeley.

Kevin D. Jennings is our senior vice president, global operations, a position he has held since February 2018 in which he is responsible for worldwide manufacturing, supply chain, logistics, and facilities. Prior to that time, he had been group vice president, global operations beginning in June 2013; and vice president, strategic development, beginning in June 2012. Prior to our acquisition of Novellus in June 2012, he held a variety of executive roles covering engineering, business development, marketing, product line general management, and operations at Novellus. Mr. Jennings has over 30 years of experience in the semiconductor capital equipment industry that includes KLA-Tencor Corporation (“KLA-Tencor”, presently named KLA Corporation) and began in 1986 at Applied Materials. He earned an M.B.A. from Pepperdine University and an undergraduate degree in electrical engineering technology from DeVry University.

Patrick J. Lord is our senior vice president and general manager of the Customer Support Business Group, a position he has held since December 2016. Previously, Dr. Lord held the position of group vice president and deputy general manager of the Global Products Group from September 2013 to December 2016. He served as the head of the Direct Metals, GapFill, Surface Integrity Group, and Integrated Metals (“DGSI”) Business Units between June 2012 and September 2013. Prior to our acquisition of Novellus in June 2012, Dr. Lord was senior vice president and general manager of the DGSI Business Units at Novellus. Additionally, Dr. Lord held the position of senior vice president of Business Development and Strategic Planning. He joined Novellus in 2001 and held a number of other positions, including executive vice president and general manager of the CMP Business Unit, senior director of Business Development, senior director of Strategic Marketing, and acting vice president of Corporate Marketing. Before joining Novellus, Dr. Lord spent six years at KLA-Tencor in various product marketing and management roles. He earned his Ph.D., M.S., and B.S. degrees in mechanical engineering from the Massachusetts Institute of Technology.

Scott G. Meikle is our senior vice president of Global Customer Operations, a position he has held since September 2017. Before joining us, he was an independent consultant for a year and director, special projects at Micron Technology, Inc., a semiconductor manufacturing company, for seven months. Prior to that time, he spent over five and a half years at Inotera Memories, Inc., a semiconductor manufacturing company, most recently as its president from August 2012 to December 2015. Dr. Meikle started his career in process R&D and advanced to various leadership roles in business operations across multiple geographies for Micron Technology, and has over 25 years of experience in the memory devices sector of the semiconductor industry. He earned his Ph.D. and M. Eng. degrees in engineering physics from Shizuoka University and McMaster University, respectively, and a B.S. degree in physics from the University of Calgary.

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Vahid Vahedi is our senior vice president and general manager of the Etch Business Unit, a position he has held since February 2018. Prior to that time, he was group vice president of the Etch product group since March 2012. Previously, he served as vice president of Etch Business Product Management and Marketing, vice president of Dielectric Etch, vice president of Conductor and 3DIC Etch, and director of Conductor Etch Technology Development. He joined us in 1995. He earned his Ph.D., M.S., and B.S. degrees in electrical engineering and computer science from the University of California, Berkeley.

Sesha Varadarajan is our senior vice president and general manager of the Deposition Business Unit, a position he has held since February 2018. Prior that time, he was group vice president of the Deposition product group since September 2013. Previously, he served as the head of the PECVD/Electrofill Business Unit between June 2012 and September 2013. Prior to our acquisition of Novellus in June 2012, Mr. Varadarajan was senior vice president and general manager of Novellus’ PECVD and Electrofill Business Units. He joined Novellus in 1999 as a process engineer with the Electrofill Business Unit and held various roles in that business unit before being appointed director of technology in 2004. Between 2006 and 2008, he worked in the PECVD Business Unit, initially as director of technology, until being promoted to product general manager. In 2009, he returned to the Electrofill Business Unit as vice president and general manager. In mid-2011, he was promoted to senior vice president and general manager, where he was also responsible for the PECVD Business Unit. Mr. Varadarajan earned an M.S. degree in manufacturing engineering and material science from Boston University and a B.S. degree in mechanical engineering from the University of Mysore.