A Dark Vector Cognition product

Item 2. PROPERTIES

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Item 2. PROPERTIES

Our corporate headquarters are located in Boise, Idaho. In addition to our principal facilities described below, we own or lease numerous other facilities in locations throughout the world used for design, R&D, and sales and marketing activities. The following is a summary of our principal facilities as of September 3, 2026:

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LocationPrincipal Operations
TaiwanR&D, wafer fabrication, component assembly and test, module assembly and test
SingaporeR&D, wafer fabrication, component assembly and test, module assembly and test
United StatesR&D, wafer fabrication, reticle manufacturing
JapanR&D, wafer fabrication
MalaysiaComponent assembly and test, module assembly and test
ChinaComponent assembly and test, module assembly and test
IndiaComponent assembly and test, module assembly and test

We believe that our existing facilities are in good condition and are suitable and adequate for our present purposes. We generally utilize all of our existing manufacturing capacity.

In addition to the supply capacity we generate through our proprietary product and process technology that increases bit density per wafer, we will need to add new DRAM wafer capacity to support projected memory demand in the second half of the decade and beyond. Following the enactment of the CHIPS Act, we announced plans to invest in leading-edge memory manufacturing sites in Idaho and New York, based on CHIPS Act support through grants and investment tax credits.

As part of this plan, in September 2022, we broke ground on a leading-edge memory manufacturing fab in Boise, Idaho. Construction of the fab began in October 2023, with first DRAM wafer output projected in mid-calendar 2027. In June 2025, in connection with certain amendments to our CHIPS Act agreements, we announced plans for a second leading-edge memory manufacturing fab in Idaho to serve growing market demand fueled by AI. Construction activities for the second Idaho fab began in 2026, and we expect initial wafer output by late calendar 2028.

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Our investment plan for New York includes construction of a leading-edge DRAM memory manufacturing site, consisting of up to four fabs to be built over the next 20-plus years, in Clay, New York. In January 2026, we broke ground on our first New York fab. In July 2026, we achieved the first concrete pour for the foundation of that fab, marking the transition from site preparation into vertical construction. We expect initial wafer output in calendar 2030. We expect these new fabs to be key to meeting our requirements for additional wafer capacity, in line with industry demand trends and our objective of maintaining stable bit share.

In 2026, we launched first production starts of our 1α (1-alpha) DDR4 technology in our Manassas, Virginia, fab, which will add to our capability to support the legacy product needs of our customers in auto, industrial, medical, aerospace and defense markets.

In December 2024, we entered into direct funding agreements with the U.S. Department of Commerce for up to $6.1 billion in direct funding pursuant to the CHIPS Act for a planned fab in Boise, Idaho, and two planned fabs in Clay, New York. In June 2025, we entered into amendments to the direct funding agreements to add a second planned fab in Boise, Idaho, and allocate certain award funding to the second planned Idaho fab from the $6.1 billion grants previously awarded under the December 2024 direct funding agreements. The direct funding for up to $6.1 billion remains unchanged. In June 2025, we also entered into a direct funding agreement with the U.S. Department of Commerce for up to $275 million in direct funding to expand and modernize our fab in Manassas, Virginia. The grants under the funding agreements represent total CHIPS Act grants of up to $6.4 billion in connection with our U.S. manufacturing expansion and modernization projects. In addition, we announced plans to bring advanced HBM packaging capabilities to the United States.

In addition to the CHIPS Act direct funding, we receive a 35% investment tax credit on qualified investments in U.S. semiconductor manufacturing under the CHIPS Act. We have also signed a non-binding term sheet with the State of New York that provides for up to $5.5 billion in funding for the planned four-fab facility over the next 20-plus years through a combination of tax credits for qualified capital investments and incentives for eligible new job wages.

In August 2026, we announced the establishment of Micron Research Labs, a long-horizon research institution headquartered in Boise, Idaho, supported by a planned investment of approximately $10 billion over the next decade to advance memory, compute and semiconductor manufacturing technologies.

Outside the United States, we are investing in manufacturing technologies, facilities and equipment, and R&D, and advancing our global back-end assembly and test network. These investments support our product portfolio and extend our ability to meet global market demand in the future. Planned investments and those underway include the following:

  • India:** Our assembly and test facility in Gujarat commenced commercial shipments and started ramping production in 2026;

  • Japan:** We broke ground in July 2026 on a new cleanroom project at our Hiroshima manufacturing facility as part of our ongoing modernization efforts to support future DRAM technology transitions, including HBM and other AI-driven memory products. The project will expand available cleanroom space and we expect initial output in late calendar 2028, enhancing our advanced memory manufacturing capabilities and supporting future customer demand;

  • Singapore:** We broke ground in January 2025 on an HBM advanced packaging facility to meaningfully expand our total advanced packaging capacity beginning in early calendar 2027. In January 2026, we broke ground on an additional advanced wafer fab facility located within our existing NAND manufacturing complex. This facility will provide additional cleanroom space when it becomes operational in the second half of calendar 2028, helping address growing market demand for NAND technology driven by the rapid expansion of AI and data-centric applications; and

  • Taiwan:** We are modernizing and expanding our existing production capacity for DRAM and HBM products to meet rising market demand. In March 2026, we completed the acquisition of a wafer fabrication facility in Tongluo, Miaoli County, Taiwan, from Powerchip Semiconductor Manufacturing Corporation for cash consideration of $1.8 billion. We expect this site to support meaningful product shipments from the existing fab beginning in mid-calendar 2027. Adding to the existing fab, we have begun construction of a similar-sized second cleanroom at this site.

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In certain countries outside of the United States, we receive or expect to receive, government incentives related to our investments. The amounts of these government incentives generally offset a portion of our planned investments and require us to meet certain conditions in order to receive such incentives.

We do not identify or allocate assets by operating segment, other than goodwill. For a breakout of the carrying value of our long-lived assets by geographic area, see Part II, Item 8. Financial Statements and Supplementary Data, Notes to Consolidated Financial Statements, Note 22. Geographic Information.

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