Item 1. Business

This Annual Report on Form 10-K and the documents incorporated by reference in this Annual Report on Form 10-K contain statements that are not historical in nature, are predictive, or that depend upon or refer to future events or conditions or contain other forward-looking statements. Statements including, but not limited to, statements regarding the extent and timing of future revenues and expenses and customer demand, statements regarding the deployment of our products and services, statements regarding our reliance on third parties, and statements using words such as “anticipates,” “believes,” “could,” “estimates,” “expects,” “forecasts,” “intends,” “may,” “plans,” “projects,” “should,” “targets,” “will” and “would,” and words of similar import and the negatives thereof, constitute forward-looking statements. These statements are predictions based upon our current expectations about future events. Actual results could vary materially as a result of certain factors, including but not limited to those expressed in these statements. Important risks and uncertainties that could cause actual results to differ materially from those contained in the forward-looking statements include, but are not limited to, those identified in “Proprietary Technology,” “Competition,” “Risk Factors,” “Critical Accounting Estimates,” “Results of Operations,” “Quantitative and Qualitative Disclosures About Market Risk” and “Liquidity and Capital Resources” contained in this Annual Report on Form 10-K and the risks discussed in our other Securities and Exchange Commission (“SEC”) filings.

We urge you to consider these factors carefully in evaluating the forward-looking statements contained in this Annual Report on Form 10-K. All subsequent written or oral forward-looking statements attributable to our company or persons acting on our behalf are expressly qualified in their entirety by these cautionary statements. The forward-looking statements included in this Annual Report on Form 10-K are made only as of the date of this Annual Report on Form 10-K. We do not intend, and undertake no obligation, to update these forward-looking statements.

Overview

We enable our customers to design electronic products. Our products and services are designed to give our customers a competitive edge in their development of electronic systems, integrated circuits (“ICs”), electronic devices and increasingly sophisticated manufactured products. Our products and services do this by optimizing performance, minimizing power consumption, shortening the time to bring our customers’ products to market and reducing their design, development and manufacturing costs. Our customers create and sell electronic products at differing levels of completeness. Our electronic systems customers deliver entire devices, such as smartphones, laptop computers, gaming systems, automobiles and autonomous driving systems, servers, cloud datacenter infrastructure, artificial intelligence (“AI”) systems, aerospace and defense, medical equipment and networking products. These systems companies internally develop, or externally purchase, the sub-components for their products, including printed circuit boards (“PCBs”), which interconnect all the hardware components, ICs, which are often referred to as computer chips, and software at various levels which runs on the hardware. Our semiconductor customers deliver ICs, which include subcategories such as memory chips, systems-on-chip (“SoCs”), analog chips, processors and other types of chips.

We offer software, hardware, services and reusable IC design blocks, which are commonly referred to as intellectual property (“IP”). Systems customers use our offerings to develop and integrate software that is key to the functionality of their products, as well as to design their ICs and PCBs. Our semiconductor customers use our offerings to design, configure, analyze and verify ICs. Additionally, some customers license our IP, which accelerates their product development processes by providing pre-designed and verified circuit blocks for their ICs.

Our strategy, which we call Intelligent System Design™, provides the technologies necessary for our customers to develop and optimize a complete and functional electronic product. We address the challenges posed by the needs and trends of electronic systems companies as well as semiconductor companies delivering greater portions of these systems. The development of electronic products, or their sub-components, is complex and requires many engineers using our solutions with specialized knowledge and skill. The rate of technical innovation in electronics is swift, long driven by a concept known as Moore’s Law, which more than 50 years ago predicted that the complexity of ICs would double about every 24 months. In order to make our customers successful, our products must handle this exponential growth rate in complexity, without requiring a corresponding increase in our customers’ costs. Historically, the industry that provided the tools used by IC engineers was referred to as Electronic Design Automation (“EDA”). Today, our offerings include and extend beyond EDA tools to enable Intelligent System Design across three layers as illustrated below—starting with IC and SoC design excellence, followed by system innovation, and then pervasive intelligence.

The core IC and SoC design excellence requires core EDA technologies for custom IC, digital IC and signoff, and functional verification, and leverages pre-build semiconductor IP. These tools, IP and associated services are specifically designed to meet the requirements of engineers who design across analog, digital and mixed-signal domains, and perform the associated verification efforts, including validation of low-level software running on the silicon model, thereby enabling design teams to manage complexity without increasing the team size or extending the project schedule, while reducing technical risks.

The second layer of our strategy centers around system innovation. It includes tools and services used for system design of the packages that encapsulate the ICs and the PCBs, system simulation which includes electromagnetic, electro-thermal and other multi-physics analysis necessary as part of optimizing the full system’s performance, Radio Frequency (“RF”) and microwave systems, and embedded software.

The third layer of our strategy is enabling pervasive intelligence in new electronics. It starts with providing solutions and services to develop AI-enhanced systems and includes machine learning and deep learning capabilities being added to the Cadence technology portfolio to make IP and tools more automated and to produce optimized results faster, supported by cloud access to address the growing computation needs of our customers.

Business Drivers

Our products and services allow our customers to design complex and innovative electronic products which are accelerated by growing digital transformation. Demand for our technology and expertise is driven by our customers’ investment in new designs and products. The most promising new opportunities for us involve enabling the design of electronic systems for AI, edge computing, hyperscale computing including datacenter infrastructure, communications, including 5G networks, augmented reality, virtual reality, internet-of-things (“IoT”), aerospace and defense, automotive, industrial and healthcare subsystems. Large and existing electronics categories, such as datacenter servers, smartphones and networking products continue to provide business opportunities for us as customers initiate new design projects.

Underlying the requirements within any particular vertical market sector is the availability of rapidly improving IC manufacturing technology. In order for our customers to take advantage of such advancements, some of our products must first be developed to exploit new manufacturing capabilities. This dependency means that we must invest significantly in product research and development (“R&D”) to keep pace with the latest manufacturing technology. The demand for new IC manufacturing technology directly impacts the demand for our newest products.

Another driver for our business is the differentiation, capabilities and benefits provided to our customers by our products. With the rapid pace of innovation comes the opportunity for our products to address key challenges associated with electronic product creation, such as power consumption, performance and cost. Our products and services have unique attributes that our customers value. In general, these attributes can be grouped into broader categories such as quality of results (“QoR”) (in terms of power consumption, performance and chip area), engineering productivity, tool performance, and faster time-to-market. Our business opportunities are significantly enhanced when our offerings address these key factors. We are applying machine learning techniques within our products to enhance QoR, productivity, performance and methodology.

Products and Product Strategy

Our Intelligent System Design strategy is to provide our customers with the ability to address the broad range of issues that arise as they develop electronic products. Our solutions are comprised of products that are categorized according to the role they play in the electronic product design process. We combine our products and technologies into categories related to major design activities, including Custom IC and Simulation, Digital IC Design and Signoff, Functional Verification, IP, and System Interconnect and Analysis.

Custom IC Design and Simulation

Our Custom IC design and simulation offerings are used by our customers to create schematic and physical representations of circuits down to the transistor level for analog, mixed-signal, custom digital, memory and RF designs. These representations are verified using simulation tools optimized for each type of design, including the design capture environment, simulation and IC layout within the Virtuoso® custom design platform. Other tools in the custom IC portfolio are used to prepare the designs for manufacturing.

Virtuoso Advanced Node adds functionality to the base Virtuoso package to enable the use of three-dimensional transistors (“FinFETs”), multi-patterning and other technologies required for advanced designs. The Virtuoso RF solution addresses the challenges of RF design across chip, package and board. Spectre® Simulator provides large-scale verification simulation. The Virtuoso System Design Platform enables engineers to design and verify concurrently across the chip, package and board.

Digital IC Design and Signoff

Digital IC design and signoff offerings are used to create logical representations of a digital circuit or an IC that can be verified for correctness prior to implementation (please refer to the discussion under “Functional Verification” below). Once the logic is verified, the design representation is implemented, or converted to a format ready for silicon manufacturing, using additional software tools within this category. The manufacturing representation is also analyzed and verified. Our digital IC and signoff technology suite provides a full flow to achieve power, performance, and area (“PPA”) design targets, and includes three major categories: logic design, physical implementation and signoff.

Our logic design offering is comprised of logic synthesis, test and equivalence checking capabilities and is typically used by customers to create and verify designs in conjunction with our functional verification capabilities. The offering includes the Genus™ Synthesis Solution, a logic synthesis offering that provides fast throughput while also offering high quality results, the Stratus™ High-Level Synthesis solution for system-level synthesis, and the Joules™ RTL Power Solution, which delivers fast power analysis while preserving near-signoff accuracy. We also offer the Modus Design-For-Test (“DFT”) software solution, which reduces SoC test time.

Our physical implementation offering comprises tools used near the end of the design process, including place and route, optimization and multi-patterning preparation. The Innovus™ Implementation System is a physical implementation offering that delivers fast design turnaround time while also delivering improved PPA characteristics. This offering enables customers to address the technology challenges of the latest semiconductor advanced-process nodes, create a physical representation of logic models and prepare a design for signoff.

Our signoff offering is comprised of tools used to signoff the design as ready for manufacture by a semiconductor foundry, which provides certification for this step. This offering includes the Tempus™ Timing Signoff Solution, Voltus™ Power Integrity Solution, Quantus™ Extraction Solution, and Pegasus™ Physical Verification System. Our design-for-manufacturing (“DFM”) products are also included in our signoff offering and are used by customers to address manufacturing and yield issues as early in the product development process as possible.

Functional Verification

Functional verification products are used by our customers to efficiently and effectively verify that the circuitry or the software they have designed will perform as intended. Verification takes place during and after custom and analog design, and before manufacturing the circuitry, significantly reducing the risk of discovering a costly error in the completed product.

Our Verification Suite™ includes four primary verification engines, starting with the JasperGold® Formal Verification Platform and Xcelium™ Parallel Logic Simulation Platform, which are used in the early stages of design, often at the IP and subsystem level. Once the design is more mature, with early formal and simulation verification tasks performed, verification engineers deploy our Palladium® Emulation Platform and Protium™ Prototyping Platform for more complete chip verification, often running low-level embedded software on top of a model of the chip, to ensure proper functionality before silicon manufacturing.

These engines are used for early bug detection, verification of block-level functionality, verification acceleration and emulation of system-level functionality, system-level power exploration, analysis and optimization, and system-level prototyping for hardware/software co-verification. Palladium provides high throughput, capacity, datacenter reliability and workgroup productivity to enable global design teams to develop advanced hardware-software systems. Protium leverages a common front end with the Palladium environment in order to move designs rapidly from emulation to the prototyping stage, allowing for software development to start weeks to months earlier.

These engines are also supported by other verification tools that provide an environment that allows for effective verification throughput, including verification planning and metric tracking, testbench automation, debugging and software-driven tests, enabling our customers to coordinate verification activities across multiple verification engines, and teams and locations for effective verification closure.

IP

Our IP offerings consist of pre-verified, customizable functional blocks, which customers integrate into their ICs to accelerate the development process and to reduce the risk of errors in the design process. We offer many types of IP, including Tensilica® configurable digital signal processors (“DSPs”), vertically targeted subsystems for AI, audio/voice, baseband and vision/imaging applications, controllers and physical interfaces for standard protocols and analog IP. We have significantly expanded our design IP portfolio in recent years through acquisitions and internal development, providing solutions for high speed SerDes, PCI, USB and many other standards.

We also offer a broad range of Verification IP (“VIP”) with memory models, which model the expected behavior of many industry standard protocols when used with verification solutions and are complementary to our design IP offerings. VIP and accelerated VIP (“AVIP”), which is used in emulation, are used across the suite of functional verification engines to verify the correct interaction with dozens of design IP interface protocols such as DDR, USB and PCI Express®. Our VIP offerings are also used in system-level verification to model correct behavior of full systems interacting with their environments.

System Interconnect and Analysis

Our system interconnect and analysis offerings are used by our customers to develop PCBs and IC packages, and analyze electromagnetic, electro-thermal and other multi-physics effects.

The capabilities in the Allegro® System Interconnect Design Platform include PCB authoring and implementation, IC package and System-in-Package (“SiP”) design and signal and power integrity (“SI/PI”) analysis and PCB library design management and collaboration. The need for compact, high-performance mobile, consumer and automotive design with advanced serial interconnect is driving the technology evolution for our PCB offerings. For mainstream PCB customers, where individual or small team productivity is a focus, we provide the OrCAD® family of offerings that is primarily marketed worldwide through a network of resellers.

Our technology portfolio expanded in 2019 into the growing system analysis market segment. The speed and close proximity of signals on silicon, through packages to boards, and through connectors and cables, exposes these communications to various kinds of interference, generates heat and emits electromagnetic radiation. Careful analysis is required to assure these systems will work as designed under a wide range of operating conditions and within compliance of standards and laws. The complexity of these devices and signal transmissions requires analysis and simulation throughout the product lifecycle to meet these objectives. Our Clarity™ 3D Solver for electromagnetic and power electronics analysis and simulation, as well as our Celsius™ Thermal Solver, provide the foundation for multi-physics analysis technology, with complete electrical-thermal co-simulation for electronic systems from ICs to physical enclosures.

Recent Acquisitions

Building upon Virtuoso RF technology and expertise and to better address increasing RF/microwave design activity, driven by growing use of 5G communications, our portfolio expanded with the acquisition of AWR Corporation and Integrand Software, Inc. in the first quarter of fiscal 2020.

Product Arrangements

We primarily license our software using time-based licenses. Our time-based license arrangements offer customers the right to access and use all of the products delivered at the outset of an arrangement and updates throughout the entire term of the arrangement, which is generally two to three years, with no rights to return. Our updates provide for continued access to our evolving technology as our customers’ designs migrate to more advanced nodes. In addition, certain time-based license arrangements include the right for the customer to remix among the products delivered at the outset of the arrangement and use of unspecified additional products that become commercially available during the term of the arrangement.

A small portion of our software is licensed under perpetual licenses, which does not include the right to use new technology. Payment terms for time-based licenses generally provide for payments to be made over the license period and payment terms for perpetual licenses generally are net 30 days.

The Cadence Cloud portfolio, consisting of Cadence-managed and customer-managed environments for electronic product developers using the scalability of the cloud, continues to expand and now includes a broader cloud-ready set of products. Contractual arrangements with customers for both environments are time based, similar to the on-premise software license arrangements described above.

Our emulation and prototyping hardware products are either sold or leased to our customers. Our emulation hardware can also be accessed remotely via a Cadence-managed cloud arrangement.

We generally license our design IP under nonexclusive license agreements that provide usage rights for specific designs. Some customers enter into a non-cancellable IP Access Agreement (“IPAA”), whereby the customer commits to a fixed dollar amount over a specified period of time that can be used to purchase from a list of IP products or services. In addition, for certain IP license agreements, we collect royalties as our customers ship their product that includes our IP to their customers.

For a further description of our license agreements, our emulation and prototyping hardware sale or lease agreements, revenue recognition policies and results of operations, please refer to the discussion under “Critical Accounting Estimates” under Part II, Item 7, “Management’s Discussion and Analysis of Financial Condition and Results of Operations.”

Technical Support and Maintenance

Customer service and support is critical to the adoption and successful use of our products. We provide our customers with technical support and maintenance to facilitate their use of our software, hardware and IP solutions.

Our education services offerings can be customized and include training programs that are delivered online or in a classroom setting. The content of these offerings ranges from the latest design techniques to methodologies for using the most recent features of our products. The primary focus of education services is to accelerate our customers’ path to productivity in the use of our products.

Services

We offer a number of services, including services related to methodology, education and hosted design solutions. These services may be sold separately or sold and performed in conjunction with the license, sale or lease of our products. As necessary, specialized design services engineers are assigned to internal R&D projects associated with our design IP business.

As part of our services offerings, we design advanced ICs, develop custom IP and help customers address design challenges. This enables us to target and accelerate the development of new software technology and products to satisfy current and future design requirements.

We offer engineering services to collaborate with our customers in the design of complex ICs and the implementation of key design capabilities, including low power design, IC packaging and board design, functional verification, digital implementation, analog/mixed-signal design and system-level design. The customers for these services primarily consist of semiconductor and systems companies developing products for the consumer, communications, automotive, aerospace and defense, and computing markets. These ICs range from digital SoCs and analog and RF designs to complex mixed-signal ICs.

In delivering methodology services, we leverage our experience and knowledge of design techniques, our products, leading practices and different design environments to improve the productivity of our customers’ engineering teams. Depending on the customers’ projects and needs, we work with customers using outsourced, consultative and collaborative offerings.

Third-Party Programs and Initiatives

In addition to our products, many customers use design tools that are provided by other companies, as well as design IP available from alternative suppliers. We support the use of third-party design products and design IP through our Connections® program and through our participation in industry groups such as the Silicon Integration Initiative and Accellera System Initiative. We actively contribute to the development and deployment of industry standards.

We also have a strategic partnership with Green Hills Software to provide embedded systems solutions focused on safety and security for critical applications such as aerospace and defense, automotive, industrial and medical devices.

Product and Maintenance and Services Revenue

Revenue, and revenue as a percentage of total revenue, from our product and maintenance and services offerings for the last three fiscal years were as follows:

	2019							2018							2017
	(In millions, except percentages)
Product and maintenance	$	2,204			94	%		$	1,998			93	%		$	1,814			93	%
Services	132				6	%		140				7	%		129				7	%
Total revenue	$	2,336						$	2,138						$	1,943

Between 85% and 90% of our revenue is characterized as recurring revenue. Revenue characterized as recurring includes revenue recognized over time from our software arrangements, services, royalties from certain IP arrangements, maintenance on IP licenses and hardware, operating leases of hardware and revenue recognized at varying points in time over the term of our IP Access Agreements.

The remainder of our revenue is characterized as upfront revenue. Up-front revenue is primarily generated by our sales of emulation and prototyping hardware and individual IP licenses. The percentage of our recurring and up-front revenue may be impacted by delivery of hardware and IP products to our customers in any single fiscal period.

For an additional description of our product and maintenance and services revenue, see the discussion under “Results of Operations” under Part II, Item 7, “Management’s Discussion and Analysis of Financial Condition and Results of Operations.” For our fiscal 2019 results of operations and our financial position as of December 28, 2019, see Part IV, Item 15, “Exhibits and Financial Statement Schedules.”

Backlog and Remaining Performance Obligations

Revenue allocated to remaining performance obligations represents the transaction price allocated to the performance obligations that are unsatisfied, or partially unsatisfied, which includes unearned revenue and amounts that will be invoiced and recognized as revenue in future periods. We have elected to exclude the potential future royalty receipts from the remaining performance obligations. Contracted but unsatisfied performance obligations were approximately $3.6 billion as of December 28, 2019, which includes $205.7 million of non-cancellable IPAA commitments from customers where actual product selection and quantities of specific products or services are to be determined by customers at a later date. We expect to recognize approximately 55% of the revenue included in the contracted but unsatisfied performance obligations, excluding non-cancellable IPAA commitments, over the next 12 months and the remainder thereafter.

Marketing and Sales

We generally market our products and provide services to existing and prospective customers through a direct sales force consisting of sales people and applications engineers. Applications engineers provide technical pre-sales and post-sales support for our products. Due to the complexity of many of our products and the system design process, the sales cycle is generally long, requiring three to six months or more. During the sales cycle, our direct sales force generally provides technical presentations, product demonstrations and support for on-site customer evaluation of our solutions. We also promote our products and services through advertising, marketing automation, trade shows, public relations and the internet. We selectively utilize value-added resellers to broaden our reach and reduce cost of sales. Our OrCAD products and certain Allegro products are primarily marketed through these channels. With respect to international sales, we generally market and support our products and services through our subsidiaries. We also use a third-party distributor to license our products and services to certain customers in Japan.

Research and Development

Our future performance depends on our ability to innovate, commercialize newly developed solutions and enhance and maintain our current products. The primary areas of our research and development align with our product categories discussed above. We must continuously re-engineer our products to solve new or increased physics challenges that arise with each successive process node and address the increase in complexity that is introduced by the resulting much larger designs. We must also keep pace with our customers’ technical developments, satisfy industry standards and meet our customers’ increasingly demanding performance, productivity, quality and predictability requirements. Therefore, we expect to continue to invest in research and development.

Hardware Manufacturing and Software Distribution

Our emulation and prototyping hardware, including all individual PCBs, custom ICs and FPGA-based prototyping components, is manufactured, assembled and tested by subcontractors before delivery to our customers. Software and documentation are primarily distributed to customers by secure electronic delivery, by way of the cloud or on DVD.

Proprietary Technology

Our success depends, in part, upon our proprietary technology. We generally rely on patents, copyrights, trademarks and trade secret laws, licenses and restrictive agreements to establish and protect our proprietary rights in technology and products. Many of our products include software or other IP licensed from third parties. We may have to seek new licenses or renew existing licenses for third-party software and other IP in the future. As part of performing engineering services for customers, our engineering services business uses certain software and other IP licensed from third parties, including that of our competitors.

Competition

We compete most frequently with Synopsys, Inc., Mentor Graphics Corporation, a division of Siemens AG, and ANSYS, Inc., and also with numerous other tools providers, manufacturers of electronic devices that have developed, acquired or have the capability to develop their own EDA products, technical software companies, electronics design and consulting companies, and other IP companies. These include Altium Limited, CEVA, Inc., Keysight Technologies, Inc. and Zuken Ltd.

Certain competitive factors in the engineering services business differ from those of the products businesses. While we compete with other EDA companies in the engineering services business, our principal competitors include independent engineering service businesses. Many of these companies are also customers, and therefore use our product offerings in the delivery of their services or products.

Corporate Information

We were organized as a Delaware corporation in June 1988. Our headquarters is located at 2655 Seely Avenue, San Jose, California 95134. Our telephone number is (408) 943-1234. We use our website at www.cadence.com to communicate important information about our company, including news releases and financial information. Our website permits investors to subscribe to email notification alerts when we post new material information on our website. We also make available on our investor relations webpage, free of charge, copies of our SEC filings and submissions, which can be found at the SEC’s website, www.sec.gov, as soon as reasonably practicable after electronically filing or furnishing such documents with the SEC. Stockholders may also request copies of these documents by writing to our Corporate Secretary at the address above. Information on our website is not incorporated by reference in this Annual Report on Form 10-K unless expressly noted.

Fiscal Year End

Our fiscal years are 52- or 53-week periods ending on the Saturday closest to December 31. Fiscal 2019, 2018 and 2017 were each 52-week fiscal years. Our next 53-week fiscal year will be fiscal 2020.

Employees

As of December 28, 2019, we had approximately 8,100 full-time employees.

INFORMATION ABOUT OUR EXECUTIVE OFFICERS

The following table provides information regarding our executive officers as of February 24, 2020:

Name		Age		Positions and Offices
Lip-Bu Tan		60		Chief Executive Officer and Director
John M. Wall		49		Senior Vice President and Chief Financial Officer
Anirudh Devgan		50		President
Thomas P. Beckley		62		Senior Vice President, Research and Development
James J. Cowie		55		Senior Vice President, General Counsel and Secretary
Surendra Babu Mandava		61		Senior Vice President, Research and Development
Chin-Chi Teng		54		Senior Vice President, Research and Development
Neil Zaman		51		Senior Vice President, Worldwide Field Operations

Our executive officers are appointed by the Board of Directors and serve at the discretion of the Board of Directors.

LIP-BU TAN has served as Chief Executive Officer of Cadence since January 2009. From January 2009 to November 2017, Mr. Tan also served as President of Cadence. Mr. Tan has been a member of the Cadence Board of Directors since February 2004. In 1987, Mr. Tan founded Walden International, an international venture capital firm, and has served as its Chairman since its founding. Mr. Tan serves as a director of Advanced Micro-Fabrication Equipment Inc. China (AMEC), Hewlett Packard Enterprise Company and Schneider Electric SE. Mr. Tan has a B.S. from Nanyang University in Singapore, an M.S. in nuclear engineering from the Massachusetts Institute of Technology and an M.B.A. from the University of San Francisco.

JOHN M. WALL has served as Senior Vice President and Chief Financial Officer of Cadence since October 2017. From October 2000 to September 2017, Mr. Wall held several positions at Cadence, most recently as Corporate Vice President and Corporate Controller from April 2016 to October 2017, Vice President, Finance and Operations, Worldwide Revenue Accounting and Sales Finance from 2015 to 2016 and Vice President, Finance and Operations, EMEA and Worldwide Revenue Accounting from 2005 to 2015. Mr. Wall has an NCBS from the Institute of Technology, Tralee and is a Fellow of the Association of Chartered Certified Accountants.

ANIRUDH DEVGAN has served as President of Cadence since November 2017. From May 2012 to November 2017, Dr. Devgan held several positions at Cadence, most recently as Executive Vice President, Research and Development from March 2017 to November 2017 and Senior Vice President, Research and Development from November 2013 to March 2017. Prior to joining Cadence, from May 2005 to March 2012, Dr. Devgan served as Corporate Vice President and General Manager of the Custom Design Business Unit at Magma Design Automation, Inc., an EDA company. Dr. Devgan has a B.Tech. in electrical engineering from the Indian Institute of Technology, Delhi, and an M.S. and Ph.D. in electrical and computer engineering from Carnegie Mellon University.

THOMAS P. BECKLEY has served as Senior Vice President, Research and Development of Cadence since September 2012. From April 2004 to September 2012, Mr. Beckley served as Corporate Vice President, Research and Development of Cadence. Prior to joining Cadence, Mr. Beckley served as President and Chief Executive Officer of Neolinear, Inc., a developer of auto-interactive and automated analog/RF tools and solutions for mixed-signal design that was acquired by Cadence in April 2004. Mr. Beckley has a B.S. in mathematics and physics from Kalamazoo College and an M.B.A. from Vanderbilt University.

JAMES J. COWIE has served as Senior Vice President and General Counsel of Cadence since April 2008 and Secretary of Cadence since May 2008. From August 2000 to March 2008, Mr. Cowie held several positions at Cadence, most recently as Corporate Vice President – Business Development, Associate General Counsel and Assistant Secretary. Mr. Cowie has an A.B. in economics from Duke University and a J.D. from Stanford Law School.

SURENDRA BABU MANDAVA has served as Senior Vice President, Research and Development of Cadence since January 2017. Prior to joining Cadence, Mr. Mandava served as Chief Executive Officer of Ineda Systems Inc., a low-power SoC solutions company, from November 2014 to July 2016, Vice President of Broadcom Corporation, a provider of semiconductor solutions, from November 2010 to December 2012, and President and then as Chief Executive Officer of Beceem Communications Inc., a semiconductor company, from December 2003 until it was acquired by Broadcom in November 2010. Mr. Mandava has a B.Tech. in electronics and communication engineering from the Regional Engineering College, Trichy, and a M.Tech. in electrical engineering and computer science from the Indian Institute of Technology, Kanpur.

CHIN-CHI TENG has served as Senior Vice President, Research and Development of Cadence since September 2018. From January 2002 to September 2018, Dr. Teng held several positions at Cadence, most recently as Corporate Vice President, Research and Development from June 2015 to September 2018, and Vice President, Research and Development from March 2009 to June 2015. Dr. Teng has a B.S. in electrical engineering from the National Taiwan University and a Ph.D. in electrical and computer engineering from the University of Illinois, Urbana-Champaign.

NEIL ZAMAN has served as Senior Vice President, Worldwide Field Operations of Cadence since September 2015. From October 1999 to September 2015, Mr. Zaman held several positions at Cadence, most recently as Corporate Vice President, North America Field Operations. Prior to joining Cadence, Mr. Zaman held positions at Phoenix Technologies Ltd. and IBM Corporation. Mr. Zaman has a B.S. in finance from California State University, Hayward.